Line data    Source code

       1              : /**
       2              :  * Copyright (c) 2025 Huawei Technologies Co., Ltd.
       3              :  * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
       4              :  * CANN Open Software License Agreement Version 2.0 (the "License").
       5              :  * Please refer to the License for details. You may not use this file except in compliance with the License.
       6              :  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
       7              :  * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
       8              :  * See LICENSE in the root of the software repository for the full text of the License.
       9              :  */
      10              : 
      11              : #include "scd_regs.h"
      12              : #include "securec.h"
      13              : 
      14              : #if defined __aarch64__ || defined __arm__ || defined _ADIAG_LLT_ARM_
      15              : 
      16              : #define SCD_REGS_X0 0
      17              : #define SCD_REGS_X1 1
      18              : #define SCD_REGS_X2 2
      19              : #define SCD_REGS_X3 3
      20              : #define SCD_REGS_X4 4
      21              : #define SCD_REGS_X5 5
      22              : #define SCD_REGS_X6 6
      23              : #define SCD_REGS_X7 7
      24              : #define SCD_REGS_X8 8
      25              : #define SCD_REGS_X9 9
      26              : #define SCD_REGS_X10 10
      27              : #define SCD_REGS_X11 11
      28              : #define SCD_REGS_X12 12
      29              : #define SCD_REGS_X13 13
      30              : #define SCD_REGS_X14 14
      31              : #define SCD_REGS_X15 15
      32              : #define SCD_REGS_X16 16
      33              : #define SCD_REGS_X17 17
      34              : #define SCD_REGS_X18 18
      35              : #define SCD_REGS_X19 19
      36              : #define SCD_REGS_X20 20
      37              : #define SCD_REGS_X21 21
      38              : #define SCD_REGS_X22 22
      39              : #define SCD_REGS_X23 23
      40              : #define SCD_REGS_X24 24
      41              : #define SCD_REGS_X25 25
      42              : #define SCD_REGS_X26 26
      43              : #define SCD_REGS_X27 27
      44              : #define SCD_REGS_X28 28
      45              : #define SCD_REGS_X29 29
      46              : #define SCD_REGS_LR 30
      47              : #define SCD_REGS_SP 31
      48              : #define SCD_REGS_PC 16
      49              : 
      50            1 : void ScdRegsLoadFromUcontext(ScdRegs* regs, ucontext_t* uc) { GET_REGISTER_FROM_CONTEXT(regs->r, &uc->uc_mcontext); }
      51              : 
      52            1 : uintptr_t ScdRegsGetPc(ScdRegs* regs) { return regs->r[SCD_REGS_PC]; }
      53              : 
      54            1 : void ScdRegsSetPc(ScdRegs* regs, uintptr_t pc) { regs->r[SCD_REGS_PC] = pc; }
      55              : 
      56            1 : uintptr_t ScdRegsGetSp(ScdRegs* regs) { return regs->r[SCD_REGS_SP]; }
      57              : 
      58            1 : void ScdRegsSetSp(ScdRegs* regs, uintptr_t sp) { regs->r[SCD_REGS_SP] = sp; }
      59              : 
      60            1 : uintptr_t ScdRegsGetFp(ScdRegs* regs) { return regs->r[SCD_REGS_X29]; }
      61              : 
      62            1 : void ScdRegsSetFp(ScdRegs* regs, uintptr_t fp) { regs->r[SCD_REGS_X29] = fp; }
      63              : 
      64            5 : TraStatus ScdRegsGetString(const ScdRegs* regs, char* buf, size_t bufSize)
      65              : {
      66            5 :     if (regs == NULL || buf == NULL || bufSize == 0) {
      67            3 :         return TRACE_INVALID_PARAM;
      68              :     }
      69            2 :     int32_t ret = snprintf_s(
      70              :         buf, bufSize, bufSize - 1U,
      71              :         "crash registers:\n"
      72              :         "    x0  0x%016lx  x1  0x%016lx  x2  0x%016lx  x3  0x%016lx\n"
      73              :         "    x4  0x%016lx  x5  0x%016lx  x6  0x%016lx  x7  0x%016lx\n"
      74              :         "    x8  0x%016lx  x9  0x%016lx  x10 0x%016lx  x11 0x%016lx\n"
      75              :         "    x12 0x%016lx  x13 0x%016lx  x14 0x%016lx  x15 0x%016lx\n"
      76              :         "    x16 0x%016lx  x17 0x%016lx  x18 0x%016lx  x19 0x%016lx\n"
      77              :         "    x20 0x%016lx  x21 0x%016lx  x22 0x%016lx  x23 0x%016lx\n"
      78              :         "    x24 0x%016lx  x25 0x%016lx  x26 0x%016lx  x27 0x%016lx\n"
      79              :         "    x28 0x%016lx  x29 0x%016lx\n"
      80              :         "    sp  0x%016lx  lr  0x%016lx  pc  0x%016lx\n\n",
      81            2 :         regs->r[SCD_REGS_X0], regs->r[SCD_REGS_X1], regs->r[SCD_REGS_X2], regs->r[SCD_REGS_X3], regs->r[SCD_REGS_X4],
      82            2 :         regs->r[SCD_REGS_X5], regs->r[SCD_REGS_X6], regs->r[SCD_REGS_X7], regs->r[SCD_REGS_X8], regs->r[SCD_REGS_X9],
      83            2 :         regs->r[SCD_REGS_X10], regs->r[SCD_REGS_X11], regs->r[SCD_REGS_X12], regs->r[SCD_REGS_X13],
      84            2 :         regs->r[SCD_REGS_X14], regs->r[SCD_REGS_X15], regs->r[SCD_REGS_X16], regs->r[SCD_REGS_X17],
      85            2 :         regs->r[SCD_REGS_X18], regs->r[SCD_REGS_X19], regs->r[SCD_REGS_X20], regs->r[SCD_REGS_X21],
      86            2 :         regs->r[SCD_REGS_X22], regs->r[SCD_REGS_X23], regs->r[SCD_REGS_X24], regs->r[SCD_REGS_X25],
      87            2 :         regs->r[SCD_REGS_X26], regs->r[SCD_REGS_X27], regs->r[SCD_REGS_X28], regs->r[SCD_REGS_X29],
      88            2 :         regs->r[SCD_REGS_SP], regs->r[SCD_REGS_LR], regs->r[SCD_REGS_PC]);
      89            2 :     if (ret == -1) {
      90            1 :         return TRACE_FAILURE;
      91              :     }
      92            1 :     return TRACE_SUCCESS;
      93              : }
      94              : 
      95              : #endif