LCOV - code coverage report
Current view: top level - aicpu_schedule/common - aicpusd_feature_ctrl_open_source.cpp (source / functions) Coverage Total Hit
Test: coverage.info Lines: 92.6 % 54 50
Test Date: 2026-08-31 10:07:09 Functions: 100.0 % 17 17

            Line data    Source code
       1              : /**
       2              :  * Copyright (c) 2025 Huawei Technologies Co., Ltd.
       3              :  * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
       4              :  * CANN Open Software License Agreement Version 2.0 (the "License").
       5              :  * Please refer to the License for details. You may not use this file except in compliance with the License.
       6              :  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
       7              :  * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
       8              :  * See LICENSE in the root of the software repository for the full text of the License.
       9              :  */
      10              : #include "aicpusd_feature_ctrl.h"
      11              : 
      12              : #include <string>
      13              : #include <cstring>
      14              : #include "aicpusd_hal_interface_ref.h"
      15              : #include "aicpusd_info.h"
      16              : #include "aicpusd_status.h"
      17              : #include "aicpusd_common.h"
      18              : #define AICPU_PLAT_GET_CHIP(type) (((type) >> 8U) & 0xffU)
      19              : namespace AicpuSchedule {
      20              : constexpr uint32_t SOC_VERSION_LEN = 50U;
      21              : 
      22              : typedef enum tagChipType {
      23              :     CHIP_ASCEND_910A = 1,
      24              :     CHIP_ASCEND_910B = 5,
      25              :     CHIP_ASCEND_950 = 15,
      26              :     CHIP_CLOUD_V5 = 16,
      27              :     CHIP_ASCEND_350 = 19,
      28              :     CHIP_CLOUD_V6 = 22,
      29              : } ChipType_t;
      30              : 
      31           65 : void FeatureCtrl::Init(const int64_t hardwareVersion, const uint32_t deviceId)
      32              : {
      33           65 :     const ChipType_t chipType = static_cast<ChipType_t>(AICPU_PLAT_GET_CHIP(static_cast<uint64_t>(hardwareVersion)));
      34           65 :     if ((chipType == CHIP_CLOUD_V5) || (chipType == CHIP_CLOUD_V6)) {
      35            0 :         aicpuFeatureUseMsqV2_ = true;
      36              :     }
      37              : 
      38           65 :     if ((chipType == CHIP_ASCEND_910A) || (chipType == CHIP_ASCEND_910B) || (chipType == CHIP_ASCEND_950) ||
      39              :         (chipType == CHIP_ASCEND_350)) {
      40            3 :         aicpuFeatureBindPidByHal_ = true;
      41              :     }
      42              : 
      43           65 :     InitMsqEnableStatus(deviceId);
      44           65 :     if ((chipType == CHIP_ASCEND_910B) && (&halGetSocVersion != nullptr)) {
      45            3 :         char_t socVersion[SOC_VERSION_LEN] = {};
      46            3 :         const auto drvRet = halGetSocVersion(deviceId, &socVersion[0U], SOC_VERSION_LEN);
      47            3 :         aicpusd_info("socVersion is %s", &socVersion[0U]);
      48            3 :         if ((drvRet == DRV_ERROR_NONE) &&
      49            3 :             (strncmp(&socVersion[0U], "Ascend910_93", strnlen("Ascend910_93", SOC_VERSION_LEN)) == 0)) {
      50            2 :             aicpuFeatureDoubleDieProduct_ = true;
      51            2 :             aicpusd_info("set isDoubleDieProduct_");
      52              :         }
      53              :     }
      54              : 
      55           65 :     if (chipType == CHIP_ASCEND_910B) {
      56            3 :         aicpuFeatureCheckEventSender_ = true;
      57              :     }
      58           65 : }
      59              : 
      60           65 : void FeatureCtrl::InitMsqEnableStatus(const uint32_t deviceId)
      61              : {
      62           65 :     int64_t cpuSchedMode = 0;
      63           65 :     aicpuSchedMode_ = SCHED_MODE_INTERRUPT;
      64           65 :     const drvError_t ret = halGetDeviceInfo(deviceId, MODULE_TYPE_AICPU, INFO_TYPE_WORK_MODE, &cpuSchedMode);
      65           65 :     if (ret == DRV_ERROR_NOT_SUPPORT) {
      66            0 :         aicpusd_info("The aicpu schedule mode is not supported, ret[%d], device id[%d]", ret, deviceId);
      67            0 :         return;
      68           65 :     } else if (ret != DRV_ERROR_NONE) {
      69            0 :         aicpusd_run_warn("Get aicpu schedule mode not success, ret[%d], device id[%d]", ret, deviceId);
      70              :     }
      71           65 :     switch (cpuSchedMode) {
      72            3 :         case HAL_NORMAL_MODE:
      73            3 :             aicpuSchedMode_ = SCHED_MODE_INTERRUPT;
      74            3 :             break;
      75           61 :         case HAL_HIGH_PERFORMANCE_MODE:
      76           61 :             aicpuSchedMode_ = SCHED_MODE_MSGQ;
      77           61 :             break;
      78            1 :         default:
      79            1 :             aicpuSchedMode_ = SCHED_MODE_INTERRUPT;
      80            1 :             aicpusd_run_warn(
      81              :                 "The aicpu schedule mode is not correct, will set to default mode, mode[%d]", cpuSchedMode);
      82              :     }
      83          130 :     const std::string modeStr = (aicpuSchedMode_ == SCHED_MODE_MSGQ) ? "message queue" : "interrupt";
      84           65 :     aicpusd_run_info("The aicpu schedule mode is %s", modeStr.c_str());
      85              : }
      86              : 
      87          330 : bool FeatureCtrl::IsAosCore() { return false; }
      88              : 
      89           29 : bool FeatureCtrl::ShouldAddtocGroup() { return aicpuFeatureAddToCGroup_; }
      90              : 
      91            5 : bool FeatureCtrl::ShouldSkipSupplyEvent() { return false; }
      92              : 
      93           26 : bool FeatureCtrl::IsBindPidByHal() { return aicpuFeatureBindPidByHal_; }
      94              : 
      95            1 : bool FeatureCtrl::IsHeterogeneousProduct() { return false; }
      96              : 
      97           10 : bool FeatureCtrl::IsNoNeedDumpOpDebugProduct() { return false; }
      98              : 
      99           28 : bool FeatureCtrl::IsDoubleDieProduct() { return aicpuFeatureDoubleDieProduct_; }
     100              : 
     101          121 : bool FeatureCtrl::BindCpuOnlyOneDevice() { return false; }
     102              : 
     103           11 : bool FeatureCtrl::IfCheckEventSender() { return aicpuFeatureCheckEventSender_; }
     104              : 
     105           49 : bool FeatureCtrl::IsUseMsqV2() { return aicpuFeatureUseMsqV2_; }
     106              : 
     107           35 : bool FeatureCtrl::ShouldInitDrvThread() { return aicpuFeatureInitDrvScheModule_; }
     108              : 
     109           12 : bool FeatureCtrl::ShouldLoadExtendKernelSo() { return aicpuFeatureLoadExtendKernelSo_; }
     110              : 
     111           32 : bool FeatureCtrl::ShouldSubmitTaskOneByOne() { return aicpuFeatureSubmitTaskOneByOne_; }
     112              : 
     113            9 : bool FeatureCtrl::ShouldMonitorWork() { return aicpuFeatureMonitorWork_; }
     114              : 
     115           12 : bool FeatureCtrl::ShouldSetModuleNullData() { return aicpuFeatureSetModelNullData_; }
     116              : 
     117              : } // namespace AicpuSchedule
        

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