Line data Source code
1 : /**
2 : * Copyright (c) 2025 Huawei Technologies Co., Ltd.
3 : * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4 : * CANN Open Software License Agreement Version 2.0 (the "License").
5 : * Please refer to the License for details. You may not use this file except in compliance with the License.
6 : * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7 : * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8 : * See LICENSE in the root of the software repository for the full text of the License.
9 : */
10 :
11 : #include "runtime/base.h"
12 : #include "dump_common.h"
13 : #include "register_config.h"
14 : #include "acc_error_info.h"
15 : #include "adump_platform_manager.h"
16 :
17 : namespace Adx {
18 :
19 177 : const std::vector<RegisterTable>& RegisterInterface::GetRegisterTable(RegisterType type) const
20 : {
21 177 : static std::vector<RegisterTable> defaultTables = {};
22 177 : return registerTableMap_.find(type) != registerTableMap_.end() ? registerTableMap_.at(type) : defaultTables;
23 : }
24 :
25 85 : const std::vector<RegisterType>& RegisterInterface::GetRegisterTypes(uint8_t coreType) const
26 : {
27 85 : static std::vector<RegisterType> defaultTypes = {};
28 85 : return registerTypeMap_.find(coreType) != registerTypeMap_.end() ? registerTypeMap_.at(coreType) : defaultTypes;
29 : }
30 :
31 86 : const std::vector<ErrorRegisterTable>& RegisterInterface::GetErrorRegisterTable() const
32 : {
33 86 : return ErrorRegisterMap_;
34 : }
35 :
36 10 : CloudV2Register::CloudV2Register()
37 : {
38 50 : registerTableMap_ = {
39 0 : {RegisterType::SU,
40 : {{GetAddr(0, 0), 32, 8}, // GPR0 - GPR31
41 : {GetAddr(0, 64), 1, 8}, // PC
42 : {GetAddr(0, 66), 8, 8}, // 66-73
43 : {GetAddr(0, 75), 4, 8}, // 75-78
44 : {GetAddr(0, 128), 12, 8}}}, // 128-139
45 0 : {RegisterType::VEC,
46 : {{GetAddr(256, 0), 2, 16}, // MASK CMPMASK
47 : {GetAddr(256, 2), 14, 8}, // 2-15
48 : {GetAddr(257, 0), 8, 16}}}, // VARF0 - VARF7
49 0 : {RegisterType::MTE,
50 : {{GetAddr(515, 0), 17, 8}, // 0-16
51 : {GetAddr(515, 23), 25, 8}}}, // AIPP_SPR_0 - AIPP_SPR_24
52 0 : {RegisterType::CUBE,
53 : {{GetAddr(768, 0), 1, 8}, // LOW_PRE_TBL
54 : {GetAddr(768, 0x2000), 1, 8}, // SMASK_INDEX
55 : {GetAddr(768, 0x4000), 1, 8}}}, // FIXP_PRE_BUF
56 110 : };
57 30 : registerTypeMap_ = {
58 : {CORE_TYPE_AIC, {RegisterType::SU, RegisterType::MTE, RegisterType::CUBE, RegisterType::BIU}},
59 50 : {CORE_TYPE_AIV, {RegisterType::SU, RegisterType::VEC, RegisterType::BIU}}};
60 200 : ErrorRegisterMap_ = {
61 : {RT_V100_AIC_ERR_0, 0x00000700, 4, "AIC_ERROR_0"}, {RT_V100_AIC_ERR_1, 0x00000704, 4, "AIC_ERROR_1"},
62 : {RT_V100_AIC_ERR_2, 0x00000760, 4, "AIC_ERROR_2"}, {RT_V100_AIC_ERR_3, 0x00000764, 4, "AIC_ERROR_3"},
63 : {RT_V100_AIC_ERR_4, 0x00000780, 4, "AIC_ERROR_4"}, {RT_V100_AIC_ERR_5, 0x00000790, 4, "AIC_ERROR_5"},
64 : {RT_V100_BIU_ERR_0, 0x00000710, 4, "BIU_ERR_INFO_0"}, {RT_V100_BIU_ERR_1, 0x00000714, 4, "BIU_ERR_INFO_1"},
65 : {RT_V100_CCU_ERR_0, 0x00000718, 4, "CCU_ERR_INFO_0"}, {RT_V100_CCU_ERR_1, 0x0000071C, 4, "CCU_ERR_INFO_1"},
66 : {RT_V100_IFU_ERR_0, 0x00000728, 4, "IFU_ERR_INFO_0"}, {RT_V100_IFU_ERR_1, 0x0000072C, 4, "IFU_ERR_INFO_1"},
67 : {RT_V100_MTE_ERR_0, 0x00000730, 4, "MTE_ERR_INFO_0"}, {RT_V100_MTE_ERR_1, 0x00000734, 4, "MTE_ERR_INFO_1"},
68 : {RT_V100_VEC_ERR_0, 0x00000738, 4, "VEC_ERR_INFO_0"}, {RT_V100_VEC_ERR_1, 0x0000073C, 4, "VEC_ERR_INFO_1"},
69 : {RT_V100_FIXP_ERR_0, 0x0000078C, 4, "FIXP_ERR_INFO_0"}, {RT_V100_FIXP_ERR_1, 0x000007C8, 4, "FIXP_ERR_INFO_1"},
70 : {RT_V100_CUBE_ERR_0, 0x00000720, 4, "CUBE_ERR_INFO"},
71 220 : };
72 100 : }
73 :
74 130 : uint64_t CloudV2Register::GetAddr(uint64_t regAddrHigh, uint64_t regAddrLow) const
75 : {
76 130 : return (regAddrHigh << HIGH_ADDR_SHIFT) | regAddrLow;
77 : }
78 :
79 14 : CloudBaseRegister::CloudBaseRegister()
80 : {
81 14 : GenAICDbgAddr();
82 14 : GenAIVDbgAddr();
83 14 : GenAICOffsetAddr();
84 14 : GenAIVOffsetAddr();
85 42 : registerTypeMap_ = {
86 : {CORE_TYPE_AIC, {RegisterType::AIC, RegisterType::AIC_DBG}},
87 : {CORE_TYPE_AIV, {RegisterType::AIV, RegisterType::AIV_DBG}}
88 70 : };
89 56 : }
90 :
91 11 : CloudV4Register::CloudV4Register()
92 : {
93 11 : InitErrorRegisterMap();
94 11 : }
95 :
96 11 : void CloudV4Register::InitErrorRegisterMap()
97 : {
98 363 : ErrorRegisterMap_ = {
99 : {RT_V200_SC_ERROR_T0_0, 0x4700, 4, "SC_ERROR_T0_0"},
100 : {RT_V200_SC_ERR_INFO_T0_0, 0x4730, 4, "SC_ERR_INFO_T0_0"},
101 : {RT_V200_SC_ERR_INFO_T0_1, 0x4734, 4, "SC_ERR_INFO_T0_1"},
102 : {RT_V200_SU_ERROR_T0_0, 0x5700, 4, "SU_ERROR_T0_0"},
103 : {RT_V200_SU_ERR_INFO_T0_0, 0x5730, 4, "SU_ERR_INFO_T0_0"},
104 : {RT_V200_SU_ERR_INFO_T0_1, 0x5734, 4, "SU_ERR_INFO_T0_1"},
105 : {RT_V200_SU_ERR_INFO_T0_2, 0x5738, 4, "SU_ERR_INFO_T0_2"},
106 : {RT_V200_SU_ERR_INFO_T0_3, 0x573C, 4, "SU_ERR_INFO_T0_3"},
107 : {RT_V200_MTE_ERROR_T0_0, 0x6700, 4, "MTE_ERROR_T0_0"},
108 : {RT_V200_MTE_ERROR_T1_0, 0x6708, 4, "MTE_ERROR_T1_0"},
109 : {RT_V200_MTE_ERR_INFO_T0_0, 0x6718, 4, "MTE_ERR_INFO_T0_0"},
110 : {RT_V200_MTE_ERR_INFO_T0_1, 0x671C, 4, "MTE_ERR_INFO_T0_1"},
111 : {RT_V200_MTE_ERR_INFO_T0_2, 0x6720, 4, "MTE_ERR_INFO_T0_2"},
112 : {RT_V200_MTE_ERR_INFO_T1_0, 0x6724, 4, "MTE_ERR_INFO_T1_0"},
113 : {RT_V200_MTE_ERR_INFO_T1_1, 0x6728, 4, "MTE_ERR_INFO_T1_1"},
114 : {RT_V200_MTE_ERR_INFO_T1_2, 0x673C, 4, "MTE_ERR_INFO_T1_2"},
115 : {RT_V200_VEC_ERROR_T0_0, 0x7700, 4, "VEC_ERROR_T0_0"},
116 : {RT_V200_VEC_ERROR_T0_2, 0x7708, 4, "VEC_ERROR_T0_2"},
117 : {RT_V200_VEC_ERR_INFO_T0_0, 0x7730, 4, "VEC_ERR_INFO_T0_0"},
118 : {RT_V200_VEC_ERR_INFO_T0_1, 0x7734, 4, "VEC_ERR_INFO_T0_1"},
119 : {RT_V200_VEC_ERR_INFO_T0_2, 0x7738, 4, "VEC_ERR_INFO_T0_2"},
120 : {RT_V200_VEC_ERR_INFO_T0_3, 0x773C, 4, "VEC_ERR_INFO_T0_3"},
121 : {RT_V200_VEC_ERR_INFO_T0_4, 0x7740, 4, "VEC_ERR_INFO_T0_4"},
122 : {RT_V200_VEC_ERR_INFO_T0_5, 0x7744, 4, "VEC_ERR_INFO_T0_5"},
123 : {RT_V200_CUBE_ERROR_T0_0, 0x8700, 4, "CUBE_ERROR_T0_0"},
124 : {RT_V200_CUBE_ERROR_T0_1, 0x8704, 4, "CUBE_ERROR_T0_1"},
125 : {RT_V200_CUBE_ERR_INFO_T0_0, 0x8730, 4, "CUBE_ERR_INFO_T0_0"},
126 : {RT_V200_CUBE_ERR_INFO_T0_1, 0x8734, 4, "CUBE_ERR_INFO_T0_1"},
127 : {RT_V200_L1_ERROR_T0_0, 0xA700, 4, "L1_ERROR_T0_0"},
128 : {RT_V200_L1_ERROR_T0_1, 0xA704, 4, "L1_ERROR_T0_1"},
129 : {RT_V200_L1_ERR_INFO_T0_0, 0xA718, 4, "L1_ERR_INFO_T0_0"},
130 : {RT_V200_L1_ERR_INFO_T0_1, 0xA71C, 4, "L1_ERR_INFO_T0_1"},
131 385 : };
132 33 : }
133 :
134 14 : void CloudBaseRegister::GenAICDbgAddr()
135 : {
136 : std::vector<RegisterTable> regAICDbgTab = {
137 : // SU(for AIC)
138 : {0X10000000000000,32, 8}, {0X10000000000040, 15, 8}, {0X10000000000080, 12, 8},
139 : {0X15000000000000, 32, 8}, {0X15800000000000, 32, 8}, {0X16000000000000, 16, 8},
140 : {0X16800000000000, 32, 8},
141 : // MTE(for AIC)
142 : {0X21000000000000, 1, 8}, {0X22000000000000, 2, 8}, {0X22000000000003, 4, 8},
143 : {0X22000000000012, 1, 8}, {0X24000000000014, 1, 8},
144 : // CUBE
145 : {0X40000000000000, 8, 8}, {0X40000000000008, 8, 8}, {0X40000000000010, 8, 8},
146 : {0X40000000000018, 8, 8}, {0X40000000000020, 8, 8}, {0X40000000000028, 8, 8},
147 : {0X40000000000030, 8, 8}, {0X40000000000038, 8, 8}, {0X40000000000040, 8, 8},
148 : {0X40000000000048, 8, 8}, {0X40000000000050, 8, 8}, {0X40000000000058, 8, 8},
149 : {0X40000000000060, 8, 8},
150 : // L1
151 : {0X60000000000000, 10, 8}, {0X61000000000000, 11, 8}, {0X67000000000000, 1, 8},
152 : // others
153 : {0X80000000000000, 5, 8}, {0X90000000000000, 9, 8}, {0X90000000000040, 8, 8},
154 : {0X90000000000080, 13, 8}, {0X900000000000c0, 8, 8}, {0Xa0000000000000, 3, 8},
155 : {0Xa0000000000100, 3, 8}, {0Xa0000000000200, 3, 8}, {0Xa0000000001000, 1, 8},
156 : {0Xa0000000001100, 1, 8}, {0Xa0000000001200, 1, 8}, {0Xa0000000002100, 2, 8},
157 : {0Xa0000000002200, 2, 8}, {0Xa0000000003000, 1, 8}, {0Xa0000000008100, 3, 8},
158 : {0Xc0000000000000, 16, 8}, {0Xd0000000000000, 1, 8}, {0Xd0000000000008, 1, 8},
159 : {0Xd0000000000010, 1, 8}, {0Xd0000000000018, 1, 8}, {0Xd0000000000020, 1, 8},
160 : {0Xd0000000000028, 1, 8}, {0Xd0000000000030, 1, 8}, {0Xd0000000000038, 1, 8},
161 : {0Xe0000000000000, 5, 8}, {0Xe0000000000100, 3, 8}, {0Xe0000000000200, 6, 8},
162 : {0Xe0000000000300, 2, 8}, {0Xe0000000000400, 1, 8}, {0Xe0000000000500, 9, 8},
163 : {0Xe0000000000600, 16, 8},
164 28 : };
165 14 : registerTableMap_[RegisterType::AIC_DBG] = regAICDbgTab;
166 14 : }
167 :
168 14 : void CloudBaseRegister::GenAIVDbgAddr()
169 : {
170 14 : std::vector<RegisterTable> regAIVDbgTab;
171 14 : auto suTab = GenAIVDbgSUAddr();
172 14 : auto mteTab = GenAIVDbgMTEAddr();
173 14 : auto vecRbTab = GenAIVDbgVECRBAddr();
174 14 : auto othersTab = GenAIVDbgOthersAddr();
175 14 : regAIVDbgTab.insert(regAIVDbgTab.end(), suTab.begin(), suTab.end());
176 14 : regAIVDbgTab.insert(regAIVDbgTab.end(), mteTab.begin(), mteTab.end());
177 14 : regAIVDbgTab.insert(regAIVDbgTab.end(), vecRbTab.begin(), vecRbTab.end());
178 14 : regAIVDbgTab.insert(regAIVDbgTab.end(), othersTab.begin(), othersTab.end());
179 14 : registerTableMap_[RegisterType::AIV_DBG] = regAIVDbgTab;
180 14 : }
181 :
182 3 : CloudV5Register::CloudV5Register()
183 : {
184 3 : InitErrorRegisterMap();
185 3 : }
186 :
187 3 : void CloudV5Register::InitErrorRegisterMap()
188 : {
189 117 : ErrorRegisterMap_ = {
190 : {RT_V200_SC_ERROR_T0_0, 0x4700, 4, "SC_ERROR_T0_0"},
191 : {RT_V200_SC_ERR_INFO_T0_0, 0x4730, 4, "SC_ERR_INFO_T0_0"},
192 : {RT_V200_SC_ERR_INFO_T0_1, 0x4734, 4, "SC_ERR_INFO_T0_1"},
193 : {RT_V200_SU_ERROR_T0_0, 0x5700, 4, "SU_ERROR_T0_0"},
194 : {RT_V200_SU_ERROR_T0_1, 0x5704, 4, "SU_ERROR_T0_1"},
195 : {RT_V200_SU_ERR_INFO_T0_0, 0x5730, 4, "SU_ERR_INFO_T0_0"},
196 : {RT_V200_SU_ERR_INFO_T0_1, 0x5734, 4, "SU_ERR_INFO_T0_1"},
197 : {RT_V200_SU_ERR_INFO_T0_2, 0x5738, 4, "SU_ERR_INFO_T0_2"},
198 : {RT_V200_SU_ERR_INFO_T0_3, 0x573C, 4, "SU_ERR_INFO_T0_3"},
199 : {RT_V200_SU_ERR_INFO_T0_4, 0x5740, 4, "SU_ERR_INFO_T0_4"},
200 : {RT_V200_SU_ERR_INFO_T0_5, 0x5744, 4, "SU_ERR_INFO_T0_5"},
201 : {RT_V200_SU_ERR_INFO_T0_6, 0x5748, 4, "SU_ERR_INFO_T0_6"},
202 : {RT_V200_SU_ERR_INFO_T0_7, 0x574C, 4, "SU_ERR_INFO_T0_7"},
203 : {RT_V200_MTE_ERROR_T0_0, 0x6700, 4, "MTE_ERROR_T0_0"},
204 : {RT_V200_MTE_ERROR_T1_0, 0x6708, 4, "MTE_ERROR_T1_0"},
205 : {RT_V200_MTE_ERR_INFO_T0_0, 0x6718, 4, "MTE_ERR_INFO_T0_0"},
206 : {RT_V200_MTE_ERR_INFO_T0_1, 0x671C, 4, "MTE_ERR_INFO_T0_1"},
207 : {RT_V200_MTE_ERR_INFO_T0_2, 0x6720, 4, "MTE_ERR_INFO_T0_2"},
208 : {RT_V200_MTE_ERR_INFO_T1_0, 0x6724, 4, "MTE_ERR_INFO_T1_0"},
209 : {RT_V200_MTE_ERR_INFO_T1_1, 0x6728, 4, "MTE_ERR_INFO_T1_1"},
210 : {RT_V200_MTE_ERR_INFO_T1_2, 0x673C, 4, "MTE_ERR_INFO_T1_2"},
211 : {RT_V200_VEC_ERROR_T0_0, 0x7700, 4, "VEC_ERROR_T0_0"},
212 : {RT_V200_VEC_ERROR_T0_2, 0x7708, 4, "VEC_ERROR_T0_2"},
213 : {RT_V200_VEC_ERR_INFO_T0_0, 0x7730, 4, "VEC_ERR_INFO_T0_0"},
214 : {RT_V200_VEC_ERR_INFO_T0_1, 0x7734, 4, "VEC_ERR_INFO_T0_1"},
215 : {RT_V200_VEC_ERR_INFO_T0_2, 0x7738, 4, "VEC_ERR_INFO_T0_2"},
216 : {RT_V200_VEC_ERR_INFO_T0_3, 0x773C, 4, "VEC_ERR_INFO_T0_3"},
217 : {RT_V200_VEC_ERR_INFO_T0_4, 0x7740, 4, "VEC_ERR_INFO_T0_4"},
218 : {RT_V200_VEC_ERR_INFO_T0_5, 0x7744, 4, "VEC_ERR_INFO_T0_5"},
219 : {RT_V200_VEC_ERR_INFO_T0_6, 0x7748, 4, "VEC_ERR_INFO_T0_6"},
220 : {RT_V200_CUBE_ERROR_T0_0, 0x8700, 4, "CUBE_ERROR_T0_0"},
221 : {RT_V200_CUBE_ERROR_T0_1, 0x8704, 4, "CUBE_ERROR_T0_1"},
222 : {RT_V200_CUBE_ERR_INFO_T0_0, 0x8730, 4, "CUBE_ERR_INFO_T0_0"},
223 : {RT_V200_CUBE_ERR_INFO_T0_1, 0x8734, 4, "CUBE_ERR_INFO_T0_1"},
224 : {RT_V200_L1_ERROR_T0_0, 0xA700, 4, "L1_ERROR_T0_0"},
225 : {RT_V200_L1_ERROR_T0_1, 0xA704, 4, "L1_ERROR_T0_1"},
226 : {RT_V200_L1_ERR_INFO_T0_0, 0xA718, 4, "L1_ERR_INFO_T0_0"},
227 : {RT_V200_L1_ERR_INFO_T0_1, 0xA71C, 4, "L1_ERR_INFO_T0_1"},
228 123 : };
229 9 : }
230 14 : std::vector<RegisterTable> CloudBaseRegister::GenAIVDbgSUAddr()
231 : {
232 : return {
233 : {0X10000000000000, 32, 8}, {0X10000000000040, 15, 8}, {0X10000000000080, 12, 8},
234 : {0X15000000000000, 32, 8}, {0X15800000000000, 32, 8}, {0X16000000000000, 16, 8},
235 : {0X16800000000000, 16, 8},
236 42 : };
237 : }
238 :
239 14 : std::vector<RegisterTable> CloudBaseRegister::GenAIVDbgMTEAddr()
240 : {
241 : return {
242 : {0X21000000000000, 1, 8}, {0X22000000000002, 1, 8}, {0X22000000000007, 3, 8},
243 : {0X2200000000000d, 3, 8}, {0X22000000000016, 9, 8}
244 42 : };
245 : }
246 :
247 14 : std::vector<RegisterTable> CloudBaseRegister::GenAIVDbgVECRBAddr()
248 : {
249 : return {
250 : {0X32000000000000, 8, 32}, {0X32000000000010, 8, 32}, {0X32000000000020, 8, 32},
251 : {0X32000000000030, 8, 32}, {0X32000000000040, 8, 32}, {0X32000000000050, 8, 32},
252 : {0X32000000000060, 8, 32}, {0X32000000000070, 8, 32}, {0X32000000000080, 8, 32},
253 : {0X32000000000090, 8, 32}, {0X320000000000a0, 8, 32}, {0X320000000000b0, 8, 32},
254 : {0X320000000000c0, 8, 32}, {0X320000000000d0, 8, 32}, {0X320000000000e0, 8, 32},
255 : {0X320000000000f0, 8, 32}, {0X32000000000100, 8, 32}, {0X32000000000110, 8, 32},
256 : {0X32000000000120, 8, 32}, {0X32000000000130, 8, 32}, {0X32000000000140, 8, 32},
257 : {0X32000000000150, 8, 32}, {0X32000000000160, 8, 32}, {0X32000000000170, 8, 32},
258 : {0X32000000000180, 8, 32}, {0X32000000000190, 8, 32}, {0X320000000001a0, 8, 32},
259 : {0X320000000001b0, 8, 32}, {0X320000000001c0, 8, 32}, {0X320000000001d0, 8, 32},
260 : {0X320000000001e0, 8, 32}, {0X320000000001f0, 8, 32}, {0X32000000000200, 1, 32},
261 : {0X32000000000202, 1, 32}, {0X32000000000204, 1, 32}, {0X32000000000206, 1, 32},
262 : {0X32000000000208, 1, 32}, {0X3200000000020a, 1, 32}, {0X3200000000020c, 1, 32},
263 : {0X3200000000020e, 1, 32}, {0X32000000000400, 24, 32}, {0X32000000000440, 24, 32},
264 : {0X32000000000480, 24, 32}, {0X320000000004c0, 24, 32}, {0X32000000000600, 4, 32},
265 : {0X32000000000800, 4, 32}, {0X32000000000804, 4, 8}, {0X32000000000a00, 64, 8},
266 : {0X32000000000c00, 8, 16}, {0X32000000000e00, 8, 8}, {0X32000000001000, 4, 8},
267 : {0X32000000001200, 1, 16}, {0X32000000001400, 1, 8}, {0X32000000001600, 1, 8},
268 : {0X32000000001800, 1, 8}, {0X32000000001a00, 1, 32}, {0X32000000001c00, 1, 8},
269 : {0X32000000001e00, 1, 8}, {0X32000000002000, 64, 8}, {0X32000000002200, 4, 8},
270 : {0X32000000002400, 9, 32}, {0X32000000002600, 5, 32}, {0X32000000002608, 5, 32},
271 : {0X32000000002800, 1, 32}, {0X32000000002804, 3, 32}, {0X32000000002808, 1, 32},
272 : {0X3200000000280c, 1, 32}, {0X32000000002a00, 2, 16}, {0X32000000002c00, 1, 8},
273 : {0X39000000000000, 5, 8}, {0X39000000004000, 64, 8}, {0X39000000008000, 0x80, 32},
274 : {0X3900000000c000, 0x80, 32}, {0X39000000010000, 0x80, 32},
275 : {0X39000000014000, 0x80, 32}, {0X39000000014080, 0x80, 32},
276 : {0X39000000014100, 0x80, 32}, {0X39000000014180, 0x80, 32},
277 : {0X39000000014200, 0x80, 32}, {0X39000000014280, 0x80, 32},
278 : {0X39000000014300, 0x80, 32}, {0X39000000014380, 0x80, 32},
279 : {0X39000000014400, 0x80, 32}, {0X39000000014480, 0x80, 32},
280 : {0X39000000014500, 0x80, 32}, {0X39000000014580, 0x80, 32},
281 : {0X39000000014600, 0x80, 32}, {0X39000000014680, 0x80, 32},
282 : {0X39000000014700, 0x80, 32}, {0X39000000014780, 0x80, 32},
283 : {0X39000000014800, 0x80, 32}, {0X39000000014880, 0x80, 32},
284 : {0X39000000014900, 0x80, 32}, {0X39000000014980, 0x80, 32},
285 : {0X39000000014a00, 0x80, 32}, {0X39000000014a80, 0x80, 32},
286 : {0X39000000014b00, 0x80, 32}, {0X39000000014b80, 0x80, 32},
287 : {0X39000000014c00, 0x80, 32}, {0X39000000014c80, 0x80, 32},
288 : {0X39000000014d00, 0x80, 32}, {0X39000000014d80, 0x80, 32},
289 : {0X39000000014e00, 0x80, 32}, {0X39000000014e80, 0x80, 32},
290 : {0X39000000014f00, 0x80, 32}, {0X39000000014f80, 0x80, 32},
291 : {0X39000000018000, 0x200, 8}, {0X3900000001c000, 64, 8}
292 42 : };
293 : }
294 :
295 14 : std::vector<RegisterTable> CloudBaseRegister::GenAIVDbgOthersAddr()
296 : {
297 : return {
298 : {0X80000000000000, 5, 8}, {0X90000000000000, 9, 8}, {0X90000000000040, 8, 8},
299 : {0X90000000000080, 13, 8}, {0X900000000000c0, 8, 8}, {0Xa0000000000000, 3, 8},
300 : {0Xa0000000000100, 3, 8}, {0Xa0000000000200, 3, 8}, {0Xa0000000001000, 1, 8},
301 : {0Xa0000000001100, 1, 8}, {0Xa0000000001200, 1, 8}, {0Xa0000000002100, 2, 8},
302 : {0Xa0000000002200, 2, 8}, {0Xa0000000003000, 1, 8}, {0Xa0000000008100, 3, 8},
303 : {0Xb0000000000000, 1, 8}, {0Xb0000000000008, 1, 8}, {0Xb0000000000010, 1, 8},
304 : {0Xb0000000000018, 1, 8}, {0Xb0000000000020, 1, 8}, {0Xb0000000000040, 1, 8},
305 : {0Xb0000000000080, 1, 8}, {0Xb00000000000c0, 1, 8}, {0Xb0000000000100, 1, 8},
306 : {0Xb0000000000140, 1, 8}, {0Xb0000000000180, 1, 8}, {0Xb00000000001c0, 1, 8},
307 : {0Xb00000000001c8, 1, 8}, {0Xb0000000000200, 1, 8}, {0Xb0000000000240, 1, 8},
308 : {0Xb0000000000280, 1, 8}, {0Xb0000000000288, 1, 8}, {0Xb0000000000290, 1, 8},
309 : {0Xb00000000002c0, 1, 8}, {0Xb00000000002c8, 1, 8}, {0Xb0000000000300, 1, 8},
310 : {0Xb0000000000340, 1, 8}, {0Xd0000000000000, 1, 8}, {0Xd0000000000008, 1, 8},
311 : {0Xd0000000000010, 1, 8}, {0Xd0000000000018, 1, 8}, {0Xd0000000000020, 1, 8},
312 : {0Xd0000000000028, 1, 8}, {0Xd0000000000030, 1, 8}, {0Xd0000000000038, 1, 8}
313 42 : };
314 : }
315 :
316 14 : void CloudBaseRegister::GenAICOffsetAddr(){
317 : std::vector<RegisterTable> regAICOffsetTab = {
318 : {0X80,30, 4}, {0X1000, 3, 4}, {0X11f0, 1, 4},
319 : {0X1200, 2, 4}, {0X1210, 1, 4}, {0X1400, 5, 4},
320 : {0X1500, 4, 4}, {0X2000, 1, 4}, {0X2010, 1, 4},
321 : {0X2020, 1, 4}, {0X2030, 2, 4}, {0X2400, 1, 4},
322 : {0X2410, 2, 4}, {0X2808, 1, 4}, {0X4000, 5, 4},
323 : {0X4020, 9, 4}, {0X4050, 4, 4}, {0X4070, 2, 4},
324 : {0X40f0, 2, 4}, {0X4140, 1, 4}, {0X4200, 4, 4},
325 : {0X4260, 4, 4}, {0X42a0, 6, 4}, {0X4700, 1, 4},
326 : {0X4720, 1, 4}, {0X4730, 2, 4}, {0X4750, 3, 4},
327 : {0X4760, 1, 4}, {0X48a0, 3, 4}, {0X48b0, 1, 4},
328 : {0X4980, 1, 4}, {0X4990, 1, 4}, {0X4998, 1, 4},
329 : {0X5000, 1, 4}, {0X5008, 2, 4}, {0X5020, 2, 4},
330 : {0X5030, 1, 4}, {0X5040, 2, 4}, {0X5050, 3, 4},
331 : {0X5060, 1, 4}, {0X50f0, 1, 4}, {0X5100, 19, 4},
332 : {0X5200, 2, 4}, {0X5300, 3, 4}, {0X5310, 1, 4},
333 : {0X5320, 8, 4}, {0X53a0, 4, 4}, {0X5600, 3, 4},
334 : {0X5700, 1, 4}, {0X5720, 1, 4}, {0X5730, 4, 4},
335 : {0X5900, 1, 4}, {0X5910, 1, 4}, {0X5920, 2, 4},
336 : {0X5930, 2, 4}, {0X5a00, 3, 4}, {0X5a80, 2, 4},
337 : {0X6000, 2, 4}, {0X6020, 6, 4}, {0X6600, 2, 4},
338 : {0X6700, 1, 4}, {0X6708, 1, 4}, {0X6710, 1, 4},
339 : {0X6718, 5, 4}, {0X673c, 1, 4}, {0X6900, 3, 4},
340 : {0X6910, 3, 4}, {0X6a00, 4, 4}, {0X6a18, 1, 4},
341 : {0X6b04, 1, 4}, {0X6b0c, 3, 4},
342 : {0X8000, 11, 4}, {0X8030, 6, 4},
343 : {0X8050, 9, 4}, {0X8080, 1, 4},
344 : {0X8088, 6, 4}, {0X8100, 2, 4},
345 : {0X8200, 3, 4}, {0X8218, 1, 4},
346 : {0X8230, 4, 4}, {0X8700, 2, 4},
347 : {0X8720, 2, 4}, {0X8730, 2, 4},
348 : {0X8900, 1, 4}, {0X8920, 1, 4},
349 : {0X8930, 2, 4}, {0X8940, 1, 4},
350 : {0X9000, 4, 4}, {0X9014, 14, 4},
351 : {0X9050, 4, 4}, {0X9090, 3, 4},
352 : {0X9200, 7, 4}, {0X9220, 11, 4},
353 : {0X9300, 7, 4}, {0X9320, 4, 4},
354 : {0X9500, 1, 4}, {0X9600, 1, 4},
355 : {0Xa000, 3, 4}, {0Xa020, 2, 4},
356 : {0Xa600, 2, 4}, {0Xa700, 2, 4},
357 : {0Xa710, 4, 4}, {0Xa900, 1, 4},
358 : {0Xa908, 1, 4}, {0Xa910, 1, 4},
359 : {0Xaa00, 1, 4}, {0Xb000, 14, 4},
360 : {0Xb070, 2, 4}, {0Xb080, 14, 4},
361 28 : };
362 14 : registerTableMap_[RegisterType::AIC] = regAICOffsetTab;
363 14 : }
364 :
365 14 : void CloudBaseRegister::GenAIVOffsetAddr(){
366 : std::vector<RegisterTable> regAIVOffsetTab = {
367 : {0X80,30, 4}, {0X1000, 3, 4}, {0X11f0, 1, 4},
368 : {0X1500, 4, 4}, {0X2000, 1, 4}, {0X2010, 1, 4},
369 : {0X1200, 2, 4}, {0X1210, 1, 4}, {0X1400, 5, 4},
370 : {0X2020, 1, 4}, {0X2030, 2, 4}, {0X2400, 1, 4},
371 : {0X4020, 9, 4}, {0X4050, 4, 4}, {0X4070, 2, 4},
372 : {0X2410, 2, 4}, {0X2808, 1, 4}, {0X4000, 5, 4},
373 : {0X40f0, 2, 4}, {0X4140, 1, 4}, {0X4200, 4, 4},
374 : {0X4260, 4, 4}, {0X42a0, 6, 4}, {0X4700, 1, 4},
375 : {0X4760, 1, 4}, {0X48a0, 3, 4}, {0X48b0, 1, 4},
376 : {0X4720, 1, 4}, {0X4730, 2, 4}, {0X4750, 3, 4},
377 : {0X4980, 1, 4}, {0X4990, 1, 4}, {0X4998, 1, 4},
378 : {0X5000, 1, 4}, {0X5008, 2, 4}, {0X5020, 2, 4},
379 : {0X5030, 1, 4}, {0X5040, 2, 4}, {0X5050, 3, 4},
380 : {0X5060, 1, 4}, {0X50f0, 1, 4},
381 : {0X5100, 19, 4}, {0X5200, 2, 4},
382 : {0X5300, 3, 4}, {0X5310, 1, 4},
383 : {0X5320, 8, 4}, {0X53a0, 4, 4},
384 : {0X5600, 3, 4}, {0X5700, 1, 4},
385 : {0X5720, 1, 4}, {0X5730, 4, 4},
386 : {0X5900, 1, 4}, {0X5910, 1, 4},
387 : {0X5920, 2, 4}, {0X5930, 2, 4},
388 : {0X5a00, 3, 4}, {0X5a80, 2, 4},
389 : {0X6000, 2, 4}, {0X6020, 6, 4},
390 : {0X6600, 2, 4}, {0X6700, 1, 4},
391 : {0X6708, 1, 4}, {0X6710, 1, 4},
392 : {0X6718, 5, 4}, {0X673c, 1, 4},
393 : {0X6900, 3, 4}, {0X6910, 3, 4},
394 : {0X6a00, 4, 4}, {0X6a18, 1, 4},
395 : {0X6b04, 1, 4}, {0X6b0c, 3, 4},
396 : {0X7004, 6, 4}, {0X7030, 1, 4},
397 : {0X7040, 3, 4}, {0X7080, 3, 4},
398 : {0X70c0, 2, 4}, {0X7100, 6, 4},
399 : {0X7200, 7, 4}, {0X7700, 1, 4},
400 : {0X7708, 1, 4}, {0X7720, 1, 4},
401 : {0X7728, 1, 4}, {0X7730, 6, 4},
402 : {0X7900, 1, 4}, {0X7920, 1, 4},
403 : {0X9000, 4, 4}, {0X9014, 14, 4},
404 : {0X9050, 4, 4}, {0X9090, 3, 4},
405 : {0X9200, 7, 4}, {0X9220, 11, 4},
406 : {0X9300, 7, 4}, {0X9320, 4, 4},
407 : {0X9500, 1, 4}, {0X9600, 1, 4},
408 : {0Xb000, 14, 4}, {0Xb070, 2, 4},
409 : {0Xb080, 14, 4},
410 28 : };
411 14 : registerTableMap_[RegisterType::AIV] = regAIVOffsetTab;
412 14 : }
413 :
414 0 : uint64_t CloudBaseRegister::GetAddr(uint64_t type, uint64_t regAddrHigh, uint64_t regAddrLow) const
415 : {
416 0 : return (type << MOUDLE_TYPE_SHIFT) | (regAddrHigh << HIGH_ADDR_SHIFT) | regAddrLow;
417 : }
418 :
419 0 : void CloudBaseRegister::GenAddrByStep(RegisterType regType, const std::vector<RegisterStepTable>& regStepTab)
420 : {
421 0 : for (const auto& stepTable : regStepTab) {
422 0 : uint64_t curStartAddr = stepTable.startAddr;
423 0 : for (uint32_t i = 0; i < stepTable.num; i++) {
424 0 : registerTableMap_[regType].emplace_back(curStartAddr, 1, stepTable.byteWidth);
425 0 : curStartAddr += stepTable.step;
426 : }
427 : }
428 0 : }
429 :
430 37 : void RegisterManager::CreateRegister()
431 : {
432 37 : auto *plat = CoredumpManager::Get();
433 37 : if (plat == nullptr) {
434 20 : return;
435 : }
436 17 : register_ = plat->CreateRegister();
437 : }
438 :
439 23 : RegisterManager::RegisterManager()
440 : {
441 23 : CreateRegister();
442 23 : }
443 :
444 86 : RegisterManager &RegisterManager::GetInstance()
445 : {
446 86 : static RegisterManager instance;
447 86 : return instance;
448 : }
449 :
450 108 : const std::shared_ptr<RegisterInterface> RegisterManager::GetRegister()
451 : {
452 108 : return register_;
453 : }
454 : }
|
