Line data Source code
1 : /**
2 : * Copyright (c) 2025 Huawei Technologies Co., Ltd.
3 : * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4 : * CANN Open Software License Agreement Version 2.0 (the "License").
5 : * Please refer to the License for details. You may not use this file except in compliance with the License.
6 : * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7 : * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8 : * See LICENSE in the root of the software repository for the full text of the License.
9 : */
10 :
11 : #include "aicpusd_model_execute.h"
12 : #include <algorithm>
13 : #include <stack>
14 : #include <cstring>
15 : #include "aicpusd_resource_manager.h"
16 : #include "aicpusd_drv_manager.h"
17 : #include "aicpusd_monitor.h"
18 : #include "aicpusd_profiler.h"
19 : #include "aicpusd_info.h"
20 : #include "aicpu_event_struct.h"
21 : #include "type_def.h"
22 : #include "profiling_adp.h"
23 : #include "aicpusd_event_process.h"
24 : #include "aicpusd_context.h"
25 :
26 : namespace {
27 : constexpr uint32_t TLV_WITH_SHAPE = 1000;
28 : constexpr uint32_t TLV_WITH_DTYPE = 1001;
29 : } // namespace
30 : namespace AicpuSchedule {
31 : bool AicpuModelManager::isUsed_(false);
32 554 : AicpuModelManager& AicpuModelManager::GetInstance()
33 : {
34 554 : static AicpuModelManager instance;
35 554 : isUsed_ = true;
36 554 : return instance;
37 : }
38 :
39 13 : int32_t AicpuModelManager::ModelLoad(const AicpuModelInfo* const modelInfo, const ModelCfgInfo* const cfgInfo)
40 : {
41 13 : if (modelInfo == nullptr) {
42 1 : aicpusd_err("ModelLoad failed, as param is null.");
43 1 : return AICPU_SCHEDULE_ERROR_PARAMETER_NOT_VALID;
44 : }
45 12 : const auto modelId = modelInfo->moduleID;
46 12 : if (modelId >= MAX_MODEL_COUNT) {
47 1 : aicpusd_err("ModelLoad failed, as modelId[%u] is invalid.", modelId);
48 1 : return AICPU_SCHEDULE_ERROR_PARAMETER_NOT_VALID;
49 : }
50 :
51 11 : return allModel_[modelId].ModelLoad(modelInfo, cfgInfo);
52 : }
53 :
54 57 : AicpuModel* AicpuModelManager::GetModel(const uint32_t modelId)
55 : {
56 57 : if (modelId >= MAX_MODEL_COUNT) {
57 1 : aicpusd_err("Get model failed, as modelId[%u] is invalid.", modelId);
58 1 : return nullptr;
59 : }
60 56 : auto& model = allModel_[modelId];
61 56 : if (!model.IsValid()) {
62 25 : aicpusd_err("Get model failed, as model[%u] is invalid.", modelId);
63 25 : return nullptr;
64 : }
65 31 : return &model;
66 : }
67 :
68 1 : AicpuModel* AicpuModelManager::GetModelByStreamId(const uint32_t streamId)
69 : {
70 1 : uint32_t modelId = 0U;
71 1 : const int32_t ret = ModelStreamManager::GetInstance().GetStreamModelId(streamId, modelId);
72 1 : if (ret != AICPU_SCHEDULE_OK) {
73 1 : aicpusd_err("can't find model by stream[%u].", streamId);
74 1 : return nullptr;
75 : }
76 0 : return GetModel(modelId);
77 : }
78 :
79 3 : AicpuModel* AicpuModelManager::GetModelByQueueId(const uint32_t queueId)
80 : {
81 3075 : for (size_t i = 0U; i < static_cast<size_t>(MAX_MODEL_COUNT); ++i) {
82 3072 : if (allModel_[i].IsValid() && (allModel_[i].HasQueue(queueId))) {
83 0 : return &allModel_[i];
84 : }
85 : }
86 3 : return nullptr;
87 : }
88 :
89 1 : std::vector<AicpuModel*> AicpuModelManager::GetModelsByTableId(const uint32_t tableId)
90 : {
91 1 : std::vector<AicpuModel*> models;
92 1025 : for (size_t i = 0U; i < static_cast<size_t>(MAX_MODEL_COUNT); ++i) {
93 1024 : if (allModel_[i].IsValid() && (allModel_[i].GetTableTryLock() == static_cast<int64_t>(tableId))) {
94 1 : models.emplace_back(&allModel_[i]);
95 : }
96 : }
97 1 : return models;
98 0 : }
99 :
100 21 : int32_t AicpuModelManager::Exit()
101 : {
102 21 : int32_t ret = AICPU_SCHEDULE_OK;
103 21 : int32_t tmpRet = AICPU_SCHEDULE_OK;
104 21525 : for (auto& model : allModel_) {
105 21504 : tmpRet = model.Exit();
106 21504 : if ((tmpRet != AICPU_SCHEDULE_OK) && (ret == AICPU_SCHEDULE_OK)) {
107 0 : ret = AICPU_SCHEDULE_ERROR_MODEL_EXIT_ERR;
108 : }
109 : }
110 21 : tensorDescMap_.clear();
111 21 : msgQMap_.clear();
112 21 : return ret;
113 : }
114 :
115 9 : void AicpuModelManager::ModelConfigClear(const uint32_t modelId)
116 : {
117 9 : const auto iter = tensorDescMap_.find(modelId);
118 9 : if (iter == tensorDescMap_.end()) {
119 9 : aicpusd_warn("modelId[%u] does not exist.", modelId);
120 9 : return;
121 : }
122 0 : (void)tensorDescMap_.erase(iter);
123 :
124 0 : const auto msqQIter = msgQMap_.find(modelId);
125 0 : if (msqQIter != msgQMap_.end()) {
126 0 : msgQMap_.erase(modelId);
127 : }
128 : }
129 :
130 9 : AicpuModelStatus AicpuModelManager::GetModelStatus(const uint32_t modelId) const
131 : {
132 9 : if (modelId >= MAX_MODEL_COUNT) {
133 1 : aicpusd_err("Get model status failed, as modelId[%u] is invalid.", modelId);
134 1 : return AicpuModelStatus::MODEL_STATUS_ERROR;
135 : }
136 8 : return allModel_[modelId].GetModelStatus();
137 : }
138 :
139 6 : StatusCode AicpuModelManager::TransModelInfo(
140 : const void* const ptr, AicpuModelInfo& aicpuModelInfo, std::vector<AicpuTaskInfo>& aicpuTaskInfos,
141 : std::vector<StreamInfo>& streamInfos, std::vector<QueInfo>& queInfos, std::vector<ModelCfgInfo>* const modelcfgs)
142 : {
143 6 : const ModelInfo* const curModelInfo = PtrToPtr<const void, const ModelInfo>(ptr);
144 6 : aicpuModelInfo.moduleID = curModelInfo->modelId;
145 6 : aicpuModelInfo.tsId = 0U;
146 : // transform stream and task info
147 6 : const ModelStreamInfo* const streams = curModelInfo->streams;
148 6 : if (streams == nullptr) {
149 1 : aicpusd_err("Streams of model info is nullptr.");
150 1 : return AICPU_SCHEDULE_ERROR_PARAMETER_NOT_VALID;
151 : }
152 9 : for (size_t streamIndex = 0UL; streamIndex < curModelInfo->aicpuStreamNum; streamIndex++) {
153 5 : const auto& stream = streams[streamIndex];
154 5 : const StreamInfo stmInfo = {stream.streamId, stream.streamFlag};
155 5 : streamInfos.push_back(stmInfo);
156 5 : const uint16_t taskNum = stream.taskNum;
157 5 : const ModelTaskInfo* const tasks = stream.tasks;
158 5 : if ((taskNum > 0) && (tasks == nullptr)) {
159 1 : aicpusd_err("Tasks of stream info is nullptr.");
160 1 : return AICPU_SCHEDULE_ERROR_PARAMETER_NOT_VALID;
161 : }
162 7 : for (size_t taskIndex = 0UL; taskIndex < taskNum; taskIndex++) {
163 3 : const auto& taskInfo = tasks[taskIndex];
164 3 : const AicpuTaskInfo curAicpuTaskInfo = {
165 3 : taskInfo.taskId,
166 3 : stream.streamId,
167 : static_cast<uint32_t>(AicpuKernelType::CCE_KERNEL),
168 3 : taskInfo.kernelName,
169 : 0U,
170 3 : taskInfo.paraBase,
171 3 : 0U};
172 3 : aicpuTaskInfos.push_back(curAicpuTaskInfo);
173 : }
174 : }
175 4 : if (aicpuTaskInfos.empty() || streamInfos.empty()) {
176 1 : aicpusd_err("one of tasks[%zu], streams[%zu] is zero.", aicpuTaskInfos.size(), streamInfos.size());
177 1 : return AICPU_SCHEDULE_ERROR_TRANS_MODELINFO_FAILED;
178 : }
179 :
180 : // transform queue info
181 3 : const ModelQueueInfo* const queues = curModelInfo->queues;
182 3 : if (queues != nullptr) {
183 4 : for (size_t queueIndex = 0UL; queueIndex < curModelInfo->queueNum; queueIndex++) {
184 2 : const ModelQueueInfo& queueInfo = queues[queueIndex];
185 2 : const QueInfo curModelQueue = {queueInfo.queueId, queueInfo.flag};
186 2 : queInfos.push_back(curModelQueue);
187 : }
188 : }
189 :
190 : // transform model cfg
191 3 : if ((curModelInfo->cfgInfoPtr != 0U) && (modelcfgs != nullptr)) {
192 0 : (void)modelcfgs->emplace_back(*(PtrToPtr<void, ModelCfgInfo>(ValueToPtr(curModelInfo->cfgInfoPtr))));
193 : }
194 :
195 3 : aicpuModelInfo.streamInfoNum = static_cast<uint16_t>(streamInfos.size());
196 3 : aicpuModelInfo.streamInfoPtr = PtrToValue(&streamInfos[0UL]);
197 3 : aicpuModelInfo.aicpuTaskNum = static_cast<uint16_t>(aicpuTaskInfos.size());
198 3 : aicpuModelInfo.aicpuTaskPtr = PtrToValue(&aicpuTaskInfos[0UL]);
199 3 : aicpuModelInfo.queueSize = static_cast<uint16_t>(queInfos.size());
200 3 : aicpuModelInfo.queueInfoPtr = queInfos.size() > 0U ? PtrToValue(&queInfos[0UL]) : 0U;
201 3 : abnormalBreaks_[aicpuModelInfo.moduleID] = curModelInfo->abnormalBreak;
202 3 : abnormalEnqueues_[aicpuModelInfo.moduleID] = curModelInfo->abnormalEnqueue;
203 3 : abnormalFlags_[aicpuModelInfo.moduleID] = curModelInfo->abnormalEnable;
204 3 : const auto ret = ProcessModelPriorityMsg(curModelInfo->aicpuPriInfo, false);
205 3 : if (ret != AICPU_SCHEDULE_OK) {
206 0 : aicpusd_err("set priority error ret[%d]", ret);
207 0 : return AICPU_SCHEDULE_ERROR_SET_PRIORITY_FAILED;
208 : }
209 3 : return AICPU_SCHEDULE_OK;
210 : }
211 :
212 10 : uint32_t AicpuModelManager::GetExtModelId(const uint32_t modelId)
213 : {
214 10 : if (modelId >= MAX_MODEL_COUNT) {
215 0 : return INVALID_NUMBER;
216 : }
217 10 : return extModelIds_[modelId];
218 : }
219 :
220 10 : bool AicpuModelManager::AbnormalBreak(const uint32_t modelId)
221 : {
222 10 : if (modelId >= MAX_MODEL_COUNT) {
223 0 : return false;
224 : }
225 10 : return abnormalBreaks_[modelId] != 0;
226 : }
227 :
228 10 : bool AicpuModelManager::AbnormalEnqueue(const uint32_t modelId)
229 : {
230 10 : if (modelId >= MAX_MODEL_COUNT) {
231 0 : return false;
232 : }
233 10 : return abnormalEnqueues_[modelId] != 0;
234 : }
235 :
236 10 : bool AicpuModelManager::AbnormalEnabled(const uint32_t modelId)
237 : {
238 10 : if (modelId >= MAX_MODEL_COUNT) {
239 0 : return false;
240 : }
241 10 : return abnormalFlags_[modelId] != 0;
242 : }
243 :
244 5125 : AicpuModelManager::AicpuModelManager()
245 : {
246 5125 : for (uint32_t& extModelId : extModelIds_) {
247 5120 : extModelId = INVALID_NUMBER;
248 : }
249 5 : }
250 :
251 3 : StatusCode AicpuModelManager::ProcessExtInfoCfgMsg(const aicpu::AicpuExtendInfo& cfgInfo)
252 : {
253 3 : const auto msgType = static_cast<aicpu::AicpuExtInfoMsgType>(cfgInfo.msgType);
254 3 : aicpusd_info(
255 : "Begin to ProcessExtInfoCfgMsg, msgType[%u], version[%u], model_id[%u], extend_model_id[%u].", msgType,
256 : cfgInfo.version, cfgInfo.modelIdMap.modelId, cfgInfo.modelIdMap.extendModelId);
257 3 : if (msgType != aicpu::AicpuExtInfoMsgType::EXT_MODEL_ID_MSG_TYPE) {
258 1 : aicpusd_err("Invalid msgType of ProcessExtInfoCfgMsg, msgType[%d].", msgType);
259 1 : return AICPU_SCHEDULE_ERROR_PARAMETER_NOT_VALID;
260 : }
261 2 : if (cfgInfo.modelIdMap.modelId >= MAX_MODEL_COUNT) {
262 1 : aicpusd_err("Invalid model id of ProcessExtInfoCfgMsg, model id[%d].", cfgInfo.modelIdMap.modelId);
263 1 : return AICPU_SCHEDULE_ERROR_PARAMETER_NOT_VALID;
264 : }
265 1 : extModelIds_[cfgInfo.modelIdMap.modelId] = cfgInfo.modelIdMap.extendModelId;
266 1 : return AICPU_SCHEDULE_OK;
267 : }
268 :
269 11 : StatusCode AicpuModelManager::CheckModelConfigShape(
270 : const uint32_t type, const uint32_t tlvLen, int32_t& unparseLen) const
271 : {
272 11 : if (type != TLV_WITH_SHAPE) {
273 1 : aicpusd_err("it is should be shape type, but not. type[%u]", type);
274 1 : return AICPU_SCHEDULE_ERROR_PARAMETER_NOT_VALID;
275 : }
276 10 : const int64_t shapeSize = static_cast<int64_t>(tlvLen) / static_cast<int64_t>(sizeof(int64_t));
277 10 : if ((tlvLen % sizeof(int64_t) != 0) || (shapeSize > MAX_DIM_SIZE)) {
278 0 : aicpusd_err("shape info is invalid, please check. tlv len[%u], shape size[%u]", tlvLen, shapeSize);
279 0 : return AICPU_SCHEDULE_ERROR_PARAMETER_NOT_VALID;
280 : }
281 :
282 10 : if (unparseLen < (static_cast<int32_t>(sizeof(TlvHead)) + static_cast<int32_t>(tlvLen))) {
283 0 : aicpusd_err("aicpu model config tensor length is error, please check.");
284 0 : return AICPU_SCHEDULE_ERROR_PARAMETER_NOT_VALID;
285 : }
286 10 : unparseLen = unparseLen - (static_cast<int32_t>(sizeof(TlvHead)) + static_cast<int32_t>(tlvLen));
287 10 : return AICPU_SCHEDULE_OK;
288 : }
289 :
290 10 : StatusCode AicpuModelManager::CheckModelConfigDtype(const TlvHead tlvHeadAddr, int32_t& unparseLen) const
291 : {
292 10 : if (unparseLen < static_cast<int32_t>(sizeof(TlvHead))) {
293 0 : aicpusd_err("aicpu model config tensor length is error, please check.");
294 0 : return AICPU_SCHEDULE_ERROR_PARAMETER_NOT_VALID;
295 : }
296 :
297 10 : const uint32_t type = tlvHeadAddr.type;
298 10 : const uint32_t len = tlvHeadAddr.len;
299 10 : if (type != TLV_WITH_DTYPE) {
300 1 : aicpusd_err("it is should be dtype type, but not. type[%u]", type);
301 1 : return AICPU_SCHEDULE_ERROR_PARAMETER_NOT_VALID;
302 : }
303 : // check unparse length
304 9 : if (unparseLen < (static_cast<int32_t>(sizeof(TlvHead)) + static_cast<int32_t>(len))) {
305 1 : aicpusd_err("aicpumodel config tensor length is error, please check.");
306 1 : return AICPU_SCHEDULE_ERROR_PARAMETER_NOT_VALID;
307 : }
308 8 : unparseLen = unparseLen - (static_cast<int32_t>(sizeof(TlvHead)) + static_cast<int32_t>(len));
309 8 : return AICPU_SCHEDULE_OK;
310 : }
311 :
312 9 : StatusCode AicpuModelManager::ParseModelConfigTensorDesc(const AicpuModelShapeConfig& cfg)
313 : {
314 : // parse tlv, get ModelConfigTensorDesc
315 9 : int32_t totalLen = static_cast<int32_t>(cfg.tensortlvLen);
316 9 : TlvHead* tlvHeadAddr = PtrToPtr<void, TlvHead>(ValueToPtr(cfg.tlvDataAddr));
317 9 : if (tlvHeadAddr == nullptr) {
318 0 : aicpusd_err("tlv data addr is invalid");
319 0 : return AICPU_SCHEDULE_ERROR_PARAMETER_NOT_VALID;
320 : }
321 9 : std::vector<ModelConfigTensorDesc> tensorInfo;
322 :
323 17 : while (totalLen > 0) {
324 : ModelConfigTensorDesc tensorDesc;
325 11 : if (totalLen < static_cast<int32_t>(sizeof(TlvHead))) {
326 0 : aicpusd_err("aicpu model config tensor length is error, please check.");
327 3 : return AICPU_SCHEDULE_ERROR_PARAMETER_NOT_VALID;
328 : }
329 11 : const uint32_t type = tlvHeadAddr->type;
330 11 : const uint32_t len = tlvHeadAddr->len;
331 11 : uint8_t* dataAddr = PtrToPtr<TlvHead, uint8_t>(tlvHeadAddr) + sizeof(TlvHead);
332 11 : tensorDesc.shape[0] = static_cast<int64_t>(len) / static_cast<int64_t>(sizeof(int64_t));
333 11 : StatusCode ret = CheckModelConfigShape(type, len, totalLen);
334 11 : if (ret != AICPU_SCHEDULE_OK) {
335 1 : aicpusd_err("CheckModelConfigShape failed");
336 1 : return ret;
337 : }
338 26 : for (int64_t j = 0; j < tensorDesc.shape[0]; j++) {
339 16 : int64_t* shapeValue = PtrToPtr<uint8_t, int64_t>(dataAddr + static_cast<int64_t>(j * sizeof(int64_t)));
340 16 : tensorDesc.shape[j + 1] = *shapeValue;
341 : }
342 :
343 10 : tlvHeadAddr = PtrToPtr<uint8_t, TlvHead>(dataAddr + len);
344 10 : ret = CheckModelConfigDtype(*tlvHeadAddr, totalLen);
345 10 : if (ret != AICPU_SCHEDULE_OK) {
346 2 : aicpusd_err("check model config dtype failed");
347 2 : return ret;
348 : }
349 :
350 8 : dataAddr = PtrToPtr<TlvHead, uint8_t>(tlvHeadAddr) + sizeof(TlvHead);
351 8 : uint32_t* dtypeVal = PtrToPtr<uint8_t, uint32_t>(dataAddr);
352 8 : tensorDesc.dtype = static_cast<int64_t>(*dtypeVal);
353 8 : tlvHeadAddr = PtrToPtr<uint8_t, TlvHead>(dataAddr + tlvHeadAddr->len);
354 8 : tensorInfo.push_back(tensorDesc);
355 : }
356 :
357 6 : tensorDescMap_[cfg.runtimeModelId] = tensorInfo;
358 6 : aicpusd_info("tensorInfo size = %zu, cfg.runtimeModelId = %u", tensorInfo.size(), cfg.runtimeModelId);
359 6 : return AICPU_SCHEDULE_OK;
360 9 : }
361 :
362 5 : StatusCode AicpuModelManager::GetModelConfigShape(
363 : const uint32_t modelId, std::vector<ModelConfigTensorDesc>& tensorDescArr)
364 : {
365 5 : if (tensorDescMap_.find(modelId) == tensorDescMap_.end()) {
366 1 : aicpusd_warn("not find modelId[%u] aicpu model shape config", modelId);
367 1 : return AICPU_SCHEDULE_ERROR_PARAMETER_NOT_VALID;
368 : }
369 4 : tensorDescArr = tensorDescMap_[modelId];
370 4 : return AICPU_SCHEDULE_OK;
371 : }
372 :
373 5 : StatusCode AicpuModelManager::ProcessModelConfigMsg(const AicpuModelConfig& cfg)
374 : {
375 5 : aicpusd_info(
376 : "Begin to process model config, version[%d], model_id[%u], extend_model_id[%u], "
377 : "abnormal_break[%d], abnormal_enqueue[%d], inputMsgQueue[%d], outputMsgQueue[%d].",
378 : cfg.version, cfg.runtimeModelId, cfg.geModelId, cfg.abnormalBreak, cfg.abnormalEnqueue, cfg.inputMsgQueue,
379 : cfg.outputMsgQueue);
380 5 : if (cfg.runtimeModelId >= MAX_MODEL_COUNT) {
381 0 : aicpusd_err("Invalid model id[%u] of model config, must < [%u].", cfg.runtimeModelId, MAX_MODEL_COUNT);
382 0 : return AICPU_SCHEDULE_ERROR_PARAMETER_NOT_VALID;
383 : }
384 5 : extModelIds_[cfg.runtimeModelId] = cfg.geModelId;
385 5 : abnormalBreaks_[cfg.runtimeModelId] = cfg.abnormalBreak;
386 5 : abnormalEnqueues_[cfg.runtimeModelId] = cfg.abnormalEnqueue;
387 5 : abnormalFlags_[cfg.runtimeModelId] = true;
388 :
389 5 : if ((cfg.inputMsgQueue <= 0) && (cfg.outputMsgQueue <= 0)) {
390 1 : return AICPU_SCHEDULE_OK;
391 : }
392 :
393 4 : if (cfg.inputMsgQueue >= 0) {
394 4 : QueueSetInputPara inPutParam = {};
395 4 : QueueSetInput inPut = {};
396 4 : inPut.queSetWorkMode.qid = cfg.inputMsgQueue;
397 4 : inPut.queSetWorkMode.workMode = QUEUE_MODE_PULL;
398 4 : inPutParam.inBuff = static_cast<void*>(&inPut);
399 4 : inPutParam.inLen = static_cast<uint32_t>(sizeof(QueueSetInput));
400 4 : const auto ret = halQueueSet(0U, QUEUE_SET_WORK_MODE, &inPutParam);
401 4 : if (ret != DRV_ERROR_NONE) {
402 1 : aicpusd_err(
403 : "Fail to set work mode for queue[%d], ret is %d.", cfg.inputMsgQueue, static_cast<int32_t>(ret));
404 2 : return AICPU_SCHEDULE_ERROR_FROM_DRV;
405 : }
406 : const auto subscribeRet =
407 3 : AicpuDrvManager::GetInstance().SubscribeQueueNotEmptyEvent(static_cast<uint32_t>(cfg.inputMsgQueue));
408 3 : if (subscribeRet != AICPU_SCHEDULE_OK) {
409 1 : aicpusd_err("Fail to subscribe queue[%d] not empty event.", cfg.inputMsgQueue);
410 1 : return subscribeRet;
411 : }
412 2 : aicpusd_info("SubscribeQueueNotEmptyEvent for queue[%d]", cfg.inputMsgQueue);
413 : }
414 :
415 2 : if (cfg.outputMsgQueue >= 0) {
416 : const auto subscribeRet =
417 2 : AicpuDrvManager::GetInstance().SubscribeQueueNotFullEvent(static_cast<uint32_t>(cfg.outputMsgQueue));
418 2 : if (subscribeRet != AICPU_SCHEDULE_OK) {
419 1 : aicpusd_err("Fail to subscribe queue[%d] not full event.", cfg.outputMsgQueue);
420 1 : return subscribeRet;
421 : }
422 1 : aicpusd_info("SubscribeQueueNotFullEvent for queue[%d]", cfg.outputMsgQueue);
423 : }
424 1 : msgQMap_[cfg.runtimeModelId] = std::make_pair(cfg.inputMsgQueue, cfg.outputMsgQueue);
425 1 : return AICPU_SCHEDULE_OK;
426 : }
427 :
428 9 : StatusCode AicpuModelManager::ProcessModelShapeConfigMsg(const AicpuModelShapeConfig& cfg)
429 : {
430 9 : aicpusd_info(
431 : "Begin to process model config, version[%d], model_id[%u], extend_model_id[%u], "
432 : "tensor info length[%u]",
433 : cfg.version, cfg.runtimeModelId, cfg.geModelId, cfg.tensortlvLen);
434 9 : if (cfg.runtimeModelId >= MAX_MODEL_COUNT) {
435 0 : aicpusd_err("Invalid model id[%u] of model config, must < [%u].", cfg.runtimeModelId, MAX_MODEL_COUNT);
436 0 : return AICPU_SCHEDULE_ERROR_PARAMETER_NOT_VALID;
437 : }
438 :
439 9 : if (cfg.tensortlvLen != 0) {
440 9 : const StatusCode ret = ParseModelConfigTensorDesc(cfg);
441 9 : if (ret != AICPU_SCHEDULE_OK) {
442 3 : aicpusd_err("Save Model Config TensorDesc failed");
443 3 : return ret;
444 : }
445 : }
446 6 : return AICPU_SCHEDULE_OK;
447 : }
448 :
449 6 : StatusCode AicpuModelManager::SetPidPriority(const AicpuPriInfo& cfg, const std::vector<uint32_t>& deviceVec)
450 : {
451 6 : if ((cfg.pidPriority == INVALID_ESCAPE_PRI_VALUE) ||
452 5 : ((cfg.pidPriority > curPidPri_) && (curPidPri_ != INVALID_ESCAPE_PRI_VALUE))) {
453 3 : aicpusd_info(
454 : "[AicpuModelEschedPriority] the new pid priority[%d] is lower than the current[%d]", cfg.pidPriority,
455 : curPidPri_);
456 3 : return AICPU_SCHEDULE_OK;
457 : }
458 :
459 3 : const std::lock_guard<std::mutex> lockForSetPidPri(mutexForSetPidPri_);
460 3 : aicpusd_info(
461 : "[AicpuModelEschedPriority] Begin to set pid priority vect size[%u], pidPriority[%d], input[%d]",
462 : deviceVec.size(), curPidPri_, cfg.pidPriority);
463 6 : for (size_t i = 0U; i < deviceVec.size(); i++) {
464 3 : if (cfg.pidPriority < curPidPri_ || curPidPri_ == INVALID_ESCAPE_PRI_VALUE) {
465 2 : const auto ret = halEschedSetPidPriority(deviceVec[i], static_cast<SCHEDULE_PRIORITY>(cfg.pidPriority));
466 2 : if (ret != DRV_ERROR_NONE) {
467 0 : aicpusd_err(
468 : "[AicpuModelEschedPriority]Failed to set priority [%d], deviceid[%u], result[%d].", cfg.pidPriority,
469 : deviceVec[i], ret);
470 0 : return AICPU_SCHEDULE_ERROR_DRV_ERR;
471 : }
472 2 : aicpusd_info(
473 : "[AicpuModelEschedPriority] set pid priority success Index[%u], deviceid[%u]", i, deviceVec[i]);
474 2 : curPidPri_ = cfg.pidPriority;
475 : }
476 : }
477 3 : aicpusd_info("[AicpuModelEschedPriority] end to set pid priority pidPriority[%d]", curPidPri_);
478 3 : return AICPU_SCHEDULE_OK;
479 3 : }
480 :
481 6 : StatusCode AicpuModelManager::SetEventPriority(const AicpuPriInfo& cfg, const std::vector<uint32_t>& deviceVec)
482 : {
483 6 : if ((cfg.eventPriority == INVALID_ESCAPE_PRI_VALUE) ||
484 5 : ((cfg.eventPriority > curEventPri_) && (curEventPri_ != INVALID_ESCAPE_PRI_VALUE))) {
485 2 : aicpusd_info(
486 : "[AicpuModelEschedPriority] the new event priority[%d] is lower than the current[%d]", cfg.eventPriority,
487 : curEventPri_);
488 2 : return AICPU_SCHEDULE_OK;
489 : }
490 :
491 4 : const std::lock_guard<std::mutex> lockForSetEvnPri(mutexForSetEvnPri_);
492 4 : aicpusd_info(
493 : "[AicpuModelEschedPriority] Begin to set event priority vecSize[%u], eventPri[%d], input[%d]", deviceVec.size(),
494 : curEventPri_, cfg.eventPriority);
495 8 : for (size_t i = 0U; i < deviceVec.size(); i++) {
496 4 : auto ret = halEschedSetEventPriority(
497 4 : deviceVec[i], EVENT_QUEUE_EMPTY_TO_NOT_EMPTY, static_cast<SCHEDULE_PRIORITY>(cfg.eventPriority));
498 4 : if (ret != DRV_ERROR_NONE) {
499 0 : aicpusd_err("[AicpuModelEschedPriority] failed set EVENT_QUEUE_EMPTY_TO_NOT_EMPTY ret[%d].", ret);
500 0 : return AICPU_SCHEDULE_ERROR_DRV_ERR;
501 : }
502 4 : aicpusd_info(
503 : "[AicpuModelEschedPriority] set EVENT_QUEUE_EMPTY_TO_NOT_EMPTY priority success Index[%u],"
504 : "deviceid[%u]",
505 : i, deviceVec[i]);
506 4 : ret = halEschedSetEventPriority(
507 4 : deviceVec[i], EVENT_QUEUE_FULL_TO_NOT_FULL, static_cast<SCHEDULE_PRIORITY>(cfg.eventPriority));
508 4 : if (ret != DRV_ERROR_NONE) {
509 0 : aicpusd_err("[AicpuModelEschedPriority] failed set EVENT_QUEUE_FULL_TO_NOT_FULL ret[%d].", ret);
510 0 : return AICPU_SCHEDULE_ERROR_DRV_ERR;
511 : }
512 4 : aicpusd_info(
513 : "[AicpuModelEschedPriority] set EVENT_QUEUE_FULL_TO_NOT_FULL priority success Index[%u],"
514 : "deviceid[%u]",
515 : i, deviceVec[i]);
516 : }
517 4 : curEventPri_ = cfg.eventPriority;
518 4 : aicpusd_info("[AicpuModelEschedPriority] end to set event priority eventPri[%d]", curEventPri_);
519 4 : return AICPU_SCHEDULE_OK;
520 4 : }
521 :
522 11 : StatusCode AicpuModelManager::ProcessModelPriorityMsg(const AicpuPriInfo& cfg, const bool isProcessMode)
523 : {
524 11 : aicpusd_info("[AicpuModelEschedPriority] Begin to process AicpuModelEschedPriority");
525 11 : if (cfg.checkHead != PRIORITY_MSG_CHECKCODE) {
526 : // checkcode error in process mode is msg error return fail
527 5 : if (isProcessMode) {
528 2 : aicpusd_err("[AicpuModelEschedPriority] the msg checkcode is error [%x]", cfg.checkHead);
529 2 : return AICPU_SCHEDULE_ERROR_PARAMETER_NOT_VALID;
530 : } else {
531 3 : return AICPU_SCHEDULE_OK;
532 : }
533 : }
534 : // get device list to set priority
535 6 : const std::vector<uint32_t> deviceVec = AicpuDrvManager::GetInstance().GetDeviceList();
536 6 : if (deviceVec.empty()) {
537 0 : aicpusd_err("[AicpuModelEschedPriority] the device vector is empty");
538 0 : return AICPU_SCHEDULE_ERROR_DRV_ERR;
539 : }
540 : // set pid priority
541 6 : auto ret = SetPidPriority(cfg, deviceVec);
542 6 : if (ret != AICPU_SCHEDULE_OK) {
543 0 : aicpusd_err("[AicpuModelEschedPriority] set pid priority error ret[%d]", ret);
544 0 : return AICPU_SCHEDULE_ERROR_DRV_ERR;
545 : }
546 : // set event priority
547 6 : ret = SetEventPriority(cfg, deviceVec);
548 6 : if (ret != AICPU_SCHEDULE_OK) {
549 0 : aicpusd_err("[AicpuModelEschedPriority] set event priority error ret[%d]", ret);
550 0 : return AICPU_SCHEDULE_ERROR_DRV_ERR;
551 : }
552 6 : return AICPU_SCHEDULE_OK;
553 6 : }
554 26 : StatusCode AicpuModelManager::GetModelMsgQueues(const uint32_t modelId, const bool isInput, int32_t& queueId) const
555 : {
556 26 : const auto iter = msgQMap_.find(modelId);
557 26 : if (iter == msgQMap_.end()) {
558 20 : return AICPU_SCHEDULE_ERROR_PARAMETER_NOT_VALID;
559 : }
560 6 : queueId = isInput ? iter->second.first : iter->second.second;
561 6 : if (queueId < 0) {
562 2 : return AICPU_SCHEDULE_ERROR_PARAMETER_NOT_VALID;
563 : }
564 4 : return AICPU_SCHEDULE_OK;
565 : }
566 :
567 24 : bool AicpuModelManager::IsUsed() { return AicpuModelManager::isUsed_; }
568 : } // namespace AicpuSchedule
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