LCOV - code coverage report
Current view: top level - aicpu_schedule/common - aicpusd_feature_ctrl_open_source.cpp (source / functions) Coverage Total Hit
Test: coverage.info Lines: 92.6 % 54 50
Test Date: 2026-08-12 11:05:02 Functions: 100.0 % 17 17

            Line data    Source code
       1              : /**
       2              :  * Copyright (c) 2025 Huawei Technologies Co., Ltd.
       3              :  * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
       4              :  * CANN Open Software License Agreement Version 2.0 (the "License").
       5              :  * Please refer to the License for details. You may not use this file except in compliance with the License.
       6              :  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
       7              :  * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
       8              :  * See LICENSE in the root of the software repository for the full text of the License.
       9              :  */
      10              : #include "aicpusd_feature_ctrl.h"
      11              : 
      12              : #include <string>
      13              : #include <cstring>
      14              : #include "aicpusd_hal_interface_ref.h"
      15              : #include "aicpusd_info.h"
      16              : #include "aicpusd_status.h"
      17              : #include "aicpusd_common.h"
      18              : #define AICPU_PLAT_GET_CHIP(type) (((type) >> 8U) & 0xffU)
      19              : namespace AicpuSchedule {
      20              : constexpr uint32_t SOC_VERSION_LEN = 50U;
      21              : 
      22              : typedef enum tagChipType {
      23              :     CHIP_ASCEND_910A = 1,
      24              :     CHIP_ASCEND_910B = 5,
      25              :     CHIP_ASCEND_950 = 15,
      26              :     CHIP_CLOUD_V5 = 16,
      27              :     CHIP_ASCEND_350 = 19,
      28              : } ChipType_t;
      29              : 
      30           64 : void FeatureCtrl::Init(const int64_t hardwareVersion, const uint32_t deviceId)
      31              : {
      32           64 :     const ChipType_t chipType = static_cast<ChipType_t>(AICPU_PLAT_GET_CHIP(static_cast<uint64_t>(hardwareVersion)));
      33           64 :     if (chipType == CHIP_CLOUD_V5) {
      34            0 :         aicpuFeatureUseMsqV2_ = true;
      35              :     }
      36              : 
      37           64 :     if ((chipType == CHIP_ASCEND_910A) || (chipType == CHIP_ASCEND_910B) || (chipType == CHIP_ASCEND_950) ||
      38              :         (chipType == CHIP_ASCEND_350)) {
      39            3 :         aicpuFeatureBindPidByHal_ = true;
      40              :     }
      41              : 
      42           64 :     InitMsqEnableStatus(deviceId);
      43           64 :     if ((chipType == CHIP_ASCEND_910B) && (&halGetSocVersion != nullptr)) {
      44            3 :         char_t socVersion[SOC_VERSION_LEN] = {};
      45            3 :         const auto drvRet = halGetSocVersion(deviceId, &socVersion[0U], SOC_VERSION_LEN);
      46            3 :         aicpusd_info("socVersion is %s", &socVersion[0U]);
      47            3 :         if ((drvRet == DRV_ERROR_NONE) &&
      48            3 :             (strncmp(&socVersion[0U], "Ascend910_93", strnlen("Ascend910_93", SOC_VERSION_LEN)) == 0)) {
      49            2 :             aicpuFeatureDoubleDieProduct_ = true;
      50            2 :             aicpusd_info("set isDoubleDieProduct_");
      51              :         }
      52              :     }
      53              : 
      54           64 :     if (chipType == CHIP_ASCEND_910B) {
      55            3 :         aicpuFeatureCheckEventSender_ = true;
      56              :     }
      57           64 : }
      58              : 
      59           64 : void FeatureCtrl::InitMsqEnableStatus(const uint32_t deviceId)
      60              : {
      61           64 :     int64_t cpuSchedMode = 0;
      62           64 :     aicpuSchedMode_ = SCHED_MODE_INTERRUPT;
      63           64 :     const drvError_t ret = halGetDeviceInfo(deviceId, MODULE_TYPE_AICPU, INFO_TYPE_WORK_MODE, &cpuSchedMode);
      64           64 :     if (ret == DRV_ERROR_NOT_SUPPORT) {
      65            0 :         aicpusd_info("The aicpu schedule mode is not supported, ret[%d], device id[%d]", ret, deviceId);
      66            0 :         return;
      67           64 :     } else if (ret != DRV_ERROR_NONE) {
      68            0 :         aicpusd_run_warn("Get aicpu schedule mode not success, ret[%d], device id[%d]", ret, deviceId);
      69              :     }
      70           64 :     switch (cpuSchedMode) {
      71            3 :         case HAL_NORMAL_MODE:
      72            3 :             aicpuSchedMode_ = SCHED_MODE_INTERRUPT;
      73            3 :             break;
      74           60 :         case HAL_HIGH_PERFORMANCE_MODE:
      75           60 :             aicpuSchedMode_ = SCHED_MODE_MSGQ;
      76           60 :             break;
      77            1 :         default:
      78            1 :             aicpuSchedMode_ = SCHED_MODE_INTERRUPT;
      79            1 :             aicpusd_run_warn(
      80              :                 "The aicpu schedule mode is not correct, will set to default mode, mode[%d]", cpuSchedMode);
      81              :     }
      82          128 :     const std::string modeStr = (aicpuSchedMode_ == SCHED_MODE_MSGQ) ? "message queue" : "interrupt";
      83           64 :     aicpusd_run_info("The aicpu schedule mode is %s", modeStr.c_str());
      84              : }
      85              : 
      86          327 : bool FeatureCtrl::IsAosCore() { return false; }
      87              : 
      88           29 : bool FeatureCtrl::ShouldAddtocGroup() { return aicpuFeatureAddToCGroup_; }
      89              : 
      90            5 : bool FeatureCtrl::ShouldSkipSupplyEvent() { return false; }
      91              : 
      92           26 : bool FeatureCtrl::IsBindPidByHal() { return aicpuFeatureBindPidByHal_; }
      93              : 
      94            1 : bool FeatureCtrl::IsHeterogeneousProduct() { return false; }
      95              : 
      96           10 : bool FeatureCtrl::IsNoNeedDumpOpDebugProduct() { return false; }
      97              : 
      98           28 : bool FeatureCtrl::IsDoubleDieProduct() { return aicpuFeatureDoubleDieProduct_; }
      99              : 
     100          121 : bool FeatureCtrl::BindCpuOnlyOneDevice() { return false; }
     101              : 
     102           11 : bool FeatureCtrl::IfCheckEventSender() { return aicpuFeatureCheckEventSender_; }
     103              : 
     104           49 : bool FeatureCtrl::IsUseMsqV2() { return aicpuFeatureUseMsqV2_; }
     105              : 
     106           34 : bool FeatureCtrl::ShouldInitDrvThread() { return aicpuFeatureInitDrvScheModule_; }
     107              : 
     108           12 : bool FeatureCtrl::ShouldLoadExtendKernelSo() { return aicpuFeatureLoadExtendKernelSo_; }
     109              : 
     110           32 : bool FeatureCtrl::ShouldSubmitTaskOneByOne() { return aicpuFeatureSubmitTaskOneByOne_; }
     111              : 
     112            9 : bool FeatureCtrl::ShouldMonitorWork() { return aicpuFeatureMonitorWork_; }
     113              : 
     114           12 : bool FeatureCtrl::ShouldSetModuleNullData() { return aicpuFeatureSetModelNullData_; }
     115              : 
     116              : } // namespace AicpuSchedule
        

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