Line data    Source code

       1              : /**
       2              :  * Copyright (c) 2026 Huawei Technologies Co., Ltd.
       3              :  * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
       4              :  * CANN Open Software License Agreement Version 2.0 (the "License").
       5              :  * Please refer to the License for details. You may not use this file except in compliance with the License.
       6              :  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
       7              :  * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
       8              :  * See LICENSE in the root of the software repository for the full text of the License.
       9              :  */
      10              : 
      11              : #include "hwts_kernel_soma.h"
      12              : 
      13              : #include "aicpusd_hal_interface_ref.h"
      14              : #include "hwts_kernel_common.h"
      15              : 
      16              : namespace AicpuSchedule {
      17              : namespace {
      18              : const std::string SOMA_MEM_MNG = "SomaMemMng";  // runtime fill kernelName && opName
      19              : }
      20              : 
      21              : enum class SomaOpType : int32_t {
      22              :     SOMA_OP_MALLOC = 0,
      23              :     SOMA_OP_FREE = 1,
      24              : };
      25              : 
      26            3 : int32_t SomaMemMngTsKernel::Compute(const aicpu::HwtsTsKernel &tsKernelInfo)
      27              : {
      28            3 :     const aicpu::HwtsCceKernel &kernel = tsKernelInfo.kernelBase.cceKernel;
      29            3 :     const auto Mng = PtrToPtr<void, SomaMemMng>(ValueToPtr(kernel.paramBase));
      30            3 :     auto op = static_cast<SomaOpType>(Mng->memAsyncOpType);
      31              :     soma_mem_pool_t pool = {
      32            3 :         .poolId = Mng->mempoolId,
      33            3 :         .devId = Mng->deviceId
      34            3 :     };
      35            3 :     drvError_t ret = DRV_ERROR_NONE;
      36            3 :     switch (op) {
      37            1 :         case SomaOpType::SOMA_OP_MALLOC:
      38            1 :             aicpusd_info("SOMA: malloc deviceId=%u,mempoolId=%llx,va=%llx,size=%llu,memAsyncSubCMD=%u.", Mng->deviceId, Mng->mempoolId, Mng->va, Mng->size, Mng->memAsyncSubCMD);
      39            1 :             ret = halMemPoolMalloc(pool, Mng->va, Mng->size, Mng->memAsyncSubCMD);
      40            1 :             break;
      41            1 :         case SomaOpType::SOMA_OP_FREE:
      42            1 :             aicpusd_info("SOMA: free deviceId=%u,mempoolId=%llx,va=%llx,memAsyncSubCMD=%u.", Mng->deviceId, Mng->mempoolId, Mng->va, Mng->memAsyncSubCMD);
      43            1 :             ret = halMemPoolFree(pool, Mng->va, Mng->size, Mng->memAsyncSubCMD);
      44            1 :             break;
      45            1 :         default:
      46            1 :             aicpusd_err("Ts Kernel SomaMemMng OpType [%d] is invalid.", static_cast<int32_t>(op));
      47            1 :             ret = DRV_ERROR_INVALID_VALUE;
      48            1 :             break;
      49              :     }
      50            3 :     if (ret != DRV_ERROR_NONE) {
      51            1 :         aicpusd_err("Ts Kernel SomaMemMng Compute failed, OpType [%d] had been processed, malloc deviceId=%u,mempoolId=%llx,va=%llx,size=%llu,memAsyncSubCMD=%u, errcode=%d", 
      52              :             static_cast<int32_t>(op), Mng->deviceId, Mng->mempoolId, Mng->va, Mng->size, Mng->memAsyncSubCMD, static_cast<int32_t>(ret));
      53            1 :         return AICPU_SCHEDULE_FAIL;
      54              :     }
      55            2 :     aicpusd_debug(
      56              :         "Finish to process ts kernel stream pool event, OpType [%d] had been processed.", static_cast<int32_t>(op));
      57            2 :     return AICPU_SCHEDULE_OK;
      58              : }
      59              : 
      60              : REGISTER_HWTS_KERNEL(SOMA_MEM_MNG, SomaMemMngTsKernel);
      61              : 
      62              : }  // namespace AicpuSchedule