Line data    Source code

       1              : /**
       2              :  * Copyright (c) 2025 Huawei Technologies Co., Ltd.
       3              :  * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
       4              :  * CANN Open Software License Agreement Version 2.0 (the "License").
       5              :  * Please refer to the License for details. You may not use this file except in compliance with the License.
       6              :  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
       7              :  * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
       8              :  * See LICENSE in the root of the software repository for the full text of the License.
       9              :  */
      10              : 
      11              : #ifndef MEM_TRANSPORT_LITE_H
      12              : #define MEM_TRANSPORT_LITE_H
      13              : #include <vector>
      14              : #include <memory>
      15              : #include <unordered_map>
      16              : #include <functional>
      17              : #include "task_param.h"
      18              : #include "base_transport_lite_impl.h"
      19              : #include "stream_lite.h"
      20              : #include "rma_buffer_lite.h"
      21              : #include "buffer.h"
      22              : #include "kernel_param_lite.h"
      23              : 
      24              : namespace Hccl {
      25              : 
      26              : class MemTransportLite {
      27              : public:
      28              :     explicit MemTransportLite(
      29              :         std::vector<char>& uniqueId,
      30              :         std::function<void(u32 streamId, u32 taskId, const TaskParam& taskParam)> callback);
      31              : 
      32              :     std::string Describe() const;
      33              : 
      34              :     using TransferOp = struct TransferOp;
      35              : 
      36           11 :     Buffer GetRmtBuffer(u32 index) { return impl->GetRmtBuffer(index); }
      37              : 
      38            6 :     void Post(u32 index, const StreamLite& stream) { impl->Post(index, stream); }
      39              : 
      40            4 :     void Wait(u32 index, const StreamLite& stream) { impl->Wait(index, stream); }
      41              : 
      42            2 :     void Read(const RmaBufferLite& loc, const Buffer& rmt, const StreamLite& stream) { impl->Read(loc, rmt, stream); }
      43              : 
      44            3 :     void Write(const RmaBufferLite& loc, const Buffer& rmt, const StreamLite& stream) { impl->Write(loc, rmt, stream); }
      45              : 
      46            2 :     void ReadReduce(const RmaBufferLite& loc, const Buffer& rmt, const ReduceIn& reduceIn, const StreamLite& stream)
      47              :     {
      48            2 :         impl->ReadReduce(loc, rmt, reduceIn, stream);
      49            2 :     }
      50              : 
      51            2 :     void WriteReduce(const RmaBufferLite& loc, const Buffer& rmt, const ReduceIn& reduceIn, const StreamLite& stream)
      52              :     {
      53            2 :         impl->WriteReduce(loc, rmt, reduceIn, stream);
      54            2 :     }
      55              : 
      56            3 :     void WriteWithNotify(
      57              :         const RmaBufferLite& loc, const Buffer& rmt, const WithNotifyIn& withNotify, const StreamLite& stream)
      58              :     {
      59            3 :         impl->WriteWithNotify(loc, rmt, withNotify, stream);
      60            3 :     }
      61              : 
      62            1 :     void WriteReduceWithNotify(
      63              :         const RmaBufferLite& loc, const Buffer& rmt, const ReduceIn& reduceIn, const WithNotifyIn& withNotify,
      64              :         const StreamLite& stream)
      65              :     {
      66            1 :         impl->WriteReduceWithNotify(loc, rmt, reduceIn, withNotify, stream);
      67            1 :     }
      68              : 
      69            1 :     void BatchOneSidedRead(
      70              :         const std::vector<RmaBufSliceLite>& loc, const std::vector<RmtRmaBufSliceLite>& rmt, const StreamLite& stream)
      71              :     {
      72            1 :         impl->BatchOneSidedRead(loc, rmt, stream);
      73            1 :     }
      74              : 
      75            1 :     void BatchOneSidedWrite(
      76              :         const std::vector<RmaBufSliceLite>& loc, const std::vector<RmtRmaBufSliceLite>& rmt, const StreamLite& stream)
      77              :     {
      78            1 :         impl->BatchOneSidedWrite(loc, rmt, stream);
      79            1 :     }
      80              : 
      81            3 :     void BatchTransfer(
      82              :         const std::vector<RmaBufferLite>& loc, const std::vector<Buffer>& rmt,
      83              :         const std::vector<BaseTransportLiteImpl::TransferOp>& transferOp, const StreamLite& stream)
      84              :     {
      85            3 :         impl->BatchTransfer(loc, rmt, transferOp, stream);
      86            3 :     }
      87              : 
      88              : private:
      89              :     TransportType type;
      90              : 
      91              :     std::unique_ptr<BaseTransportLiteImpl> impl;
      92              : };
      93              : 
      94              : } // namespace Hccl
      95              : #endif