LCOV - code coverage report
Current view: top level - legacy/ascend950/unified_platform/resource/transport/aicpu - base_transport_lite_impl.h (source / functions) Coverage Total Hit
Test: coverage.info Lines: 22.5 % 40 9
Test Date: 2026-08-18 17:47:01 Functions: 32.0 % 25 8

            Line data    Source code
       1              : /**
       2              :  * Copyright (c) 2025 Huawei Technologies Co., Ltd.
       3              :  * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
       4              :  * CANN Open Software License Agreement Version 2.0 (the "License").
       5              :  * Please refer to the License for details. You may not use this file except in compliance with the License.
       6              :  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
       7              :  * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
       8              :  * See LICENSE in the root of the software repository for the full text of the License.
       9              :  */
      10              : 
      11              : #ifndef BASE_MEM_TRANSPORT_LITE_H
      12              : #define BASE_MEM_TRANSPORT_LITE_H
      13              : 
      14              : #include <memory>
      15              : #include <vector>
      16              : #include <unordered_map>
      17              : #include "stream_lite.h"
      18              : #include "buffer.h"
      19              : #include "internal_exception.h"
      20              : #include "rma_buffer_lite.h"
      21              : #include "mem_transport_common.h"
      22              : #include "rmt_rma_buf_slice_lite.h"
      23              : #include "task_param.h"
      24              : namespace Hccl {
      25              : 
      26            6 : inline HcclReduceOp ConvertReduceOpToHcclReduceOp(ReduceOp reduceOp)
      27              : {
      28              :     static std::map<ReduceOp, HcclReduceOp> reduceTypeMap
      29              :         = {{ReduceOp::SUM, HcclReduceOp::HCCL_REDUCE_SUM},
      30              :            {ReduceOp::PROD, HcclReduceOp::HCCL_REDUCE_PROD},
      31              :            {ReduceOp::MAX, HcclReduceOp::HCCL_REDUCE_MAX},
      32            8 :            {ReduceOp::MIN, HcclReduceOp::HCCL_REDUCE_MIN}};
      33            6 :     if (UNLIKELY(reduceTypeMap.find(reduceOp) == reduceTypeMap.end())) {
      34            0 :         THROW<InternalException>(StringFormat("reduceOp[%u] is invalid", reduceOp));
      35              :     }
      36            6 :     return reduceTypeMap[reduceOp];
      37              : }
      38              : 
      39          185 : MAKE_ENUM(
      40              :     TransferType, WRITE, WRITE_REDUCE, WRITE_WITH_NOTIFY, WRITE_REDUCE_WITH_NOTIFY, READ, READ_REDUCE, NOTIFY_RECORD)
      41              : 
      42              : class BaseTransportLiteImpl {
      43              : public:
      44          277 :     BaseTransportLiteImpl() = default;
      45              : 
      46          277 :     virtual ~BaseTransportLiteImpl() = default;
      47              : 
      48            0 :     virtual std::string Describe() const { return "BaseTransportLiteImpl"; }
      49              : 
      50              :     struct TransferOp {
      51              :         TransferType transType;
      52              :         ReduceIn reduceIn;
      53              :     };
      54              : 
      55            0 :     virtual Buffer GetRmtBuffer(u32 index)
      56              :     {
      57              :         (void)index;
      58            0 :         return Buffer(0, 0);
      59              :     }
      60              : 
      61            0 :     virtual HcclResult BuildLocRmaBufferLite(const uintptr_t addr, const size_t size, RmaBufferLite& rmaBufferLite)
      62              :     {
      63              :         (void)addr;
      64              :         (void)size;
      65            0 :         rmaBufferLite = RmaBufferLite(0, 0, 0, 0);
      66            0 :         return HCCL_SUCCESS;
      67              :     }
      68              : 
      69            0 :     virtual void Post(u32 index, const StreamLite& stream)
      70              :     {
      71              :         (void)index;
      72              :         (void)stream;
      73            0 :     }
      74              : 
      75            0 :     virtual void Wait(u32 index, const StreamLite& stream)
      76              :     {
      77              :         (void)index;
      78              :         (void)stream;
      79            0 :     }
      80              : 
      81            0 :     virtual void WaitWithTimeout(u32 index, const StreamLite& stream, u32 timeout)
      82              :     {
      83              :         (void)index;
      84              :         (void)stream;
      85              :         (void)timeout;
      86            0 :     }
      87              : 
      88            0 :     virtual void Read(const RmaBufferLite& loc, const Buffer& rmt, const StreamLite& stream)
      89              :     {
      90              :         (void)loc;
      91              :         (void)rmt;
      92              :         (void)stream;
      93            0 :     }
      94              : 
      95            0 :     virtual void Write(const RmaBufferLite& loc, const Buffer& rmt, const StreamLite& stream)
      96              :     {
      97              :         (void)loc;
      98              :         (void)rmt;
      99              :         (void)stream;
     100            0 :     }
     101              : 
     102              :     virtual void
     103            0 :     ReadReduce(const RmaBufferLite& loc, const Buffer& rmt, const ReduceIn& reduceIn, const StreamLite& stream)
     104              :     {
     105              :         (void)loc;
     106              :         (void)rmt;
     107              :         (void)reduceIn;
     108              :         (void)stream;
     109            0 :     }
     110              : 
     111              :     virtual void
     112            0 :     WriteReduce(const RmaBufferLite& loc, const Buffer& rmt, const ReduceIn& reduceIn, const StreamLite& stream)
     113              :     {
     114              :         (void)loc;
     115              :         (void)rmt;
     116              :         (void)reduceIn;
     117              :         (void)stream;
     118            0 :     }
     119              : 
     120            0 :     virtual void WriteWithNotify(
     121              :         const RmaBufferLite& loc, const Buffer& rmt, const WithNotifyIn& withNotify, const StreamLite& stream)
     122              :     {
     123              :         (void)loc;
     124              :         (void)rmt;
     125              :         (void)withNotify;
     126              :         (void)stream;
     127            0 :     }
     128              : 
     129            0 :     virtual void WriteReduceWithNotify(
     130              :         const RmaBufferLite& loc, const Buffer& rmt, const ReduceIn& reduceIn, const WithNotifyIn& withNotify,
     131              :         const StreamLite& stream)
     132              :     {
     133              :         (void)loc;
     134              :         (void)rmt;
     135              :         (void)reduceIn;
     136              :         (void)withNotify;
     137              :         (void)stream;
     138            0 :     }
     139              : 
     140            0 :     virtual void BatchOneSidedWrite(
     141              :         const std::vector<RmaBufSliceLite>& loc, const std::vector<RmtRmaBufSliceLite>& rmt, const StreamLite& stream)
     142              :     {
     143              :         (void)loc;
     144              :         (void)rmt;
     145              :         (void)stream;
     146            0 :     }
     147              : 
     148            0 :     virtual void BatchOneSidedRead(
     149              :         const std::vector<RmaBufSliceLite>& loc, const std::vector<RmtRmaBufSliceLite>& rmt, const StreamLite& stream)
     150              :     {
     151              :         (void)loc;
     152              :         (void)rmt;
     153              :         (void)stream;
     154            0 :     }
     155              : 
     156            2 :     virtual void BatchTransfer(
     157              :         const std::vector<RmaBufferLite>& loc, const std::vector<Buffer>& rmt,
     158              :         const std::vector<TransferOp>& transferOp, const StreamLite& stream)
     159              :     {
     160              :         (void)loc;
     161              :         (void)rmt;
     162              :         (void)transferOp;
     163              :         (void)stream;
     164            2 :     }
     165              : 
     166            0 :     virtual void Drain(const StreamLite& stream) { (void)stream; }
     167              : 
     168            0 :     virtual HcclResult Fence() { return HCCL_SUCCESS; }
     169              : 
     170              : protected:
     171              : private:
     172              : };
     173              : 
     174              : } // namespace Hccl
     175              : #endif
        

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