Line data Source code
1 : /**
2 : * Copyright (c) 2025 Huawei Technologies Co., Ltd.
3 : * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4 : * CANN Open Software License Agreement Version 2.0 (the "License").
5 : * Please refer to the License for details. You may not use this file except in compliance with the License.
6 : * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7 : * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8 : * See LICENSE in the root of the software repository for the full text of the License.
9 : */
10 :
11 : #include "coll_all_to_all_v_fullmesh_executor.h"
12 :
13 : namespace hccl {
14 :
15 0 : CollRunAlltoAllVFullMesh::CollRunAlltoAllVFullMesh(
16 0 : const HcclDispatcher dispatcher, std::unique_ptr<TopoMatcher>& topoMatcher)
17 0 : : CollAlltoAllExecutor(dispatcher, topoMatcher)
18 0 : {}
19 :
20 0 : HcclResult CollRunAlltoAllVFullMesh::CalcStreamNum(u32& streamNum)
21 : {
22 0 : if (SatisfyIntraSuperPod(
23 0 : topoAttr_.deviceType, topoAttr_.userRankSize, topoAttr_.useSuperPodMode, topoAttr_.superPodNum)) {
24 0 : streamNum = topoAttr_.userRankSize - 1;
25 : } else {
26 0 : streamNum = 0;
27 : }
28 0 : HCCL_INFO("[CollRunAlltoAllVFullMesh][CalcStreamNum] tag[%s] streamNum[%u]", tag_.c_str(), streamNum);
29 0 : return HCCL_SUCCESS;
30 : }
31 :
32 : // level0-level1 打平fullmesh
33 0 : HcclResult CollRunAlltoAllVFullMesh::CalcLevel0CommInfo(
34 : TransportMemType inputType, TransportMemType outputType, std::vector<LevelNSubCommTransport>& opTransport)
35 : {
36 0 : CommParaInfo commCombinePara(COMM_COMBINE_ORDER, CommType::COMM_TAG_MESH);
37 0 : CHK_RET(CalcCommPlaneInfo(tag_, commCombinePara, opTransport[COMM_COMBINE_ORDER], inputType, outputType));
38 0 : return HCCL_SUCCESS;
39 0 : }
40 :
41 0 : HcclResult CollRunAlltoAllVFullMesh::CalcLevel2CommInfo(
42 : TransportMemType inputType, TransportMemType outputType, std::vector<LevelNSubCommTransport>& opTransport)
43 : {
44 0 : CommParaInfo commParaLevel2(COMM_LEVEL2, CommType::COMM_TAG_MESH);
45 0 : CHK_RET(CalcCommPlaneInfo(tag_, commParaLevel2, opTransport[COMM_LEVEL2], inputType, outputType));
46 0 : return HCCL_SUCCESS;
47 0 : }
48 :
49 0 : HcclResult CollRunAlltoAllVFullMesh::CalAlltoAllFullMeshCommInfo(
50 : TransportMemType inputType, TransportMemType outputType, std::vector<LevelNSubCommTransport>& opTransport)
51 : {
52 : (void)inputType;
53 : (void)outputType;
54 : // A+X单机双module启用下，未使能RDMA不能进行一层pairWise。
55 0 : bool isDifModule
56 0 : = topoAttr_.serverNum == 1 && topoAttr_.isDiffDeviceModule && topoAttr_.userRankSize > HCCL_ALLTOALLV_P2P_SIZE;
57 0 : CHK_PRT_RET(
58 : isDifModule && !algoAttr_.isUsedRdmaLevel0,
59 : HCCL_ERROR("[CalAlltoAllFullMeshCommInfo] not support dual modules in a single server"
60 : " when RDMA disabled "),
61 : HCCL_E_NOT_SUPPORT);
62 :
63 : // 将网卡初始化判断，提到上层调用，减少无必要的循环依赖。
64 0 : if (workflowMode_ == HcclWorkflowMode::HCCL_WORKFLOW_MODE_OP_BASE) {
65 : // level0 - level1 全连接通信域
66 0 : CHK_RET(CalcLevel0CommInfo(TransportMemType::CCL_INPUT, TransportMemType::CCL_OUTPUT, opTransport));
67 : // level2 层通信域
68 0 : CHK_RET(CalcLevel2CommInfo(TransportMemType::CCL_INPUT, TransportMemType::CCL_OUTPUT, opTransport));
69 : } else {
70 : // level0 - level1 全连接通信域
71 0 : CHK_RET(CalcLevel0CommInfo(TransportMemType::PARAM_INPUT, TransportMemType::PARAM_OUTPUT, opTransport));
72 : // level2 层通信域
73 0 : CHK_RET(CalcLevel2CommInfo(TransportMemType::PARAM_INPUT, TransportMemType::PARAM_OUTPUT, opTransport));
74 : }
75 0 : return HCCL_SUCCESS;
76 : }
77 :
78 0 : HcclResult CollRunAlltoAllVFullMesh::CalcCommInfo(std::vector<LevelNSubCommTransport>& opTransport)
79 : {
80 0 : TransportMemType inputType = TransportMemType::RESERVED;
81 0 : TransportMemType outputType = TransportMemType::RESERVED;
82 :
83 0 : CHK_RET(CalAlltoAllFullMeshCommInfo(inputType, outputType, opTransport));
84 0 : return HCCL_SUCCESS;
85 : }
86 :
87 0 : HcclResult CollRunAlltoAllVFullMesh::KernelRun(const OpParam& param, ExecMem& execMem)
88 : {
89 0 : HCCL_CONFIG_INFO(HCCL_ALG, "[CollRunAlltoAllVFullMesh][KernelRun] AllToAllV fullmesh start");
90 0 : bool opbaseCopyMode = workflowMode_ == HcclWorkflowMode::HCCL_WORKFLOW_MODE_OP_BASE && isAlltoAllZCopyMode_;
91 :
92 : // 构造入参
93 0 : AlltoAllVBufferInfo sendInfo;
94 0 : sendInfo.mem = opbaseCopyMode ? execMem.inputMem : algResResp_->paramInputMem;
95 0 : sendInfo.counts = &allMeshAggregationSendRecvInfo_[topoAttr_.userRank].sendCounts[0];
96 0 : sendInfo.displs = &allMeshAggregationSendRecvInfo_[topoAttr_.userRank].sendDispls[0];
97 0 : sendInfo.dataType = param.All2AllDataDes.sendType;
98 :
99 0 : AlltoAllVBufferInfo recvInfo;
100 0 : recvInfo.mem = opbaseCopyMode ? execMem.outputMem : algResResp_->paramOutputMem;
101 0 : recvInfo.counts = &allMeshAggregationSendRecvInfo_[topoAttr_.userRank].recvCounts[0];
102 0 : recvInfo.displs = &allMeshAggregationSendRecvInfo_[topoAttr_.userRank].recvDispls[0];
103 0 : recvInfo.dataType = param.All2AllDataDes.recvType;
104 :
105 0 : CHK_RET(CheckCommSize(COMM_COMBINE_ORDER, COMM_INDEX_0 + 1));
106 0 : SubCommInfo level0CommInfo = GetSubCommInfo(COMM_COMBINE_ORDER, COMM_INDEX_0);
107 :
108 : // 执行算法
109 0 : std::map<u32, std::vector<u64>> rankSendDisplsMap;
110 0 : std::map<u32, std::vector<u64>> rankRecvDisplsMap;
111 0 : if (workflowMode_ != HcclWorkflowMode::HCCL_WORKFLOW_MODE_OP_BASE || isAlltoAllZCopyMode_) {
112 0 : for (u32 i = 0; i < topoAttr_.userRankSize; i++) {
113 0 : rankSendDisplsMap.insert(
114 0 : std::pair<u32, std::vector<u64>>(i, allMeshAggregationSendRecvInfo_[i].sendOffset));
115 0 : rankRecvDisplsMap.insert(
116 0 : std::pair<u32, std::vector<u64>>(i, allMeshAggregationSendRecvInfo_[i].recvOffset));
117 : }
118 : }
119 :
120 : std::unique_ptr<AlgTemplateBase> pairWisePtr
121 0 : = AlgTemplateRegistry::Instance().GetAlgTemplate(TemplateType::TEMPLATE_ALL_2_ALL_V_PAIRWISE, dispatcher_);
122 0 : CHK_SMART_PTR_NULL(pairWisePtr);
123 0 : if (workflowMode_ == HcclWorkflowMode::HCCL_WORKFLOW_MODE_OP_BASE
124 0 : && !isAlltoAllZCopyMode_) { // 单算子 && Buffer Copy模式
125 0 : CHK_RET(pairWisePtr->Prepare(
126 : sendInfo, recvInfo, execMem.inputMem, execMem.outputMem, isAlltoAllZCopyMode_,
127 : const_cast<Stream&>(param.stream), workflowMode_, rankSendDisplsMap, rankRecvDisplsMap));
128 0 : CHK_RET(RunAlltoAllTemplate(pairWisePtr, level0CommInfo));
129 0 : } else if (workflowMode_ == HcclWorkflowMode::HCCL_WORKFLOW_MODE_OP_BASE && isAlltoAllZCopyMode_) {
130 0 : DeviceMem dstMem = execMem.inputMem.range(0, algResResp_->paramInputMem.size());
131 0 : CHK_RET(HcclD2DMemcpyAsync(dispatcher_, dstMem, algResResp_->paramInputMem, const_cast<Stream&>(param.stream)));
132 :
133 0 : CHK_RET(pairWisePtr->Prepare(
134 : sendInfo, recvInfo, execMem.inputMem, execMem.outputMem, isAlltoAllZCopyMode_,
135 : const_cast<Stream&>(param.stream), workflowMode_, rankSendDisplsMap, rankRecvDisplsMap));
136 0 : CHK_RET(RunAlltoAllTemplate(pairWisePtr, level0CommInfo)); // inputMem_ -> outputMem_
137 :
138 0 : DeviceMem srcMem = execMem.outputMem.range(0, algResResp_->paramOutputMem.size());
139 0 : CHK_RET(
140 : HcclD2DMemcpyAsync(dispatcher_, algResResp_->paramOutputMem, srcMem, const_cast<Stream&>(param.stream)));
141 0 : } else if (workflowMode_ == HcclWorkflowMode::HCCL_WORKFLOW_MODE_OPS_KERNEL_INFO_LIB) {
142 0 : CHK_RET(pairWisePtr->Prepare(
143 : sendInfo, recvInfo, isAlltoAllZCopyMode_, const_cast<Stream&>(param.stream), workflowMode_,
144 : rankSendDisplsMap, rankRecvDisplsMap));
145 : // 保证最新的commMesh是为该次alltoallv创建（不支持多线程）
146 0 : CHK_RET(RunAlltoAllTemplate(pairWisePtr, level0CommInfo));
147 : } else {
148 0 : HCCL_ERROR("[hcclImpl][RunAlltoAllVFullMesh]work flow mode is invalid");
149 0 : return HCCL_E_PARA;
150 : }
151 :
152 0 : HCCL_INFO("[CollRunAlltoAllVFullMesh] executor run success");
153 :
154 0 : return HCCL_SUCCESS;
155 0 : }
156 :
157 : REGISTER_EXEC("RunAlltoAllVFullMesh", AlltoAllVFullMesh, CollRunAlltoAllVFullMesh);
158 : } // namespace hccl
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