LCOV - code coverage report
Current view: top level - legacy/ascend950/unified_platform/resource/transport/aicpu - base_transport_lite_impl.h (source / functions) Coverage Total Hit
Test: coverage.info Lines: 22.5 % 40 9
Test Date: 2026-08-17 10:19:35 Functions: 32.0 % 25 8

            Line data    Source code
       1              : /**
       2              :  * Copyright (c) 2025 Huawei Technologies Co., Ltd.
       3              :  * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
       4              :  * CANN Open Software License Agreement Version 2.0 (the "License").
       5              :  * Please refer to the License for details. You may not use this file except in compliance with the License.
       6              :  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
       7              :  * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
       8              :  * See LICENSE in the root of the software repository for the full text of the License.
       9              :  */
      10              : #ifndef BASE_MEM_TRANSPORT_LITE_H
      11              : #define BASE_MEM_TRANSPORT_LITE_H
      12              : 
      13              : #include <memory>
      14              : #include <vector>
      15              : #include <unordered_map>
      16              : #include "stream_lite.h"
      17              : #include "buffer.h"
      18              : #include "internal_exception.h"
      19              : #include "rma_buffer_lite.h"
      20              : #include "mem_transport_common.h"
      21              : #include "rmt_rma_buf_slice_lite.h"
      22              : #include "task_param.h"
      23              : namespace Hccl {
      24              : 
      25            6 : inline HcclReduceOp ConvertReduceOpToHcclReduceOp(ReduceOp reduceOp)
      26              : {
      27              :     static std::map<ReduceOp, HcclReduceOp> reduceTypeMap
      28              :         = {{ReduceOp::SUM, HcclReduceOp::HCCL_REDUCE_SUM},
      29              :            {ReduceOp::PROD, HcclReduceOp::HCCL_REDUCE_PROD},
      30              :            {ReduceOp::MAX, HcclReduceOp::HCCL_REDUCE_MAX},
      31            8 :            {ReduceOp::MIN, HcclReduceOp::HCCL_REDUCE_MIN}};
      32            6 :     if (UNLIKELY(reduceTypeMap.find(reduceOp) == reduceTypeMap.end())) {
      33            0 :         THROW<InternalException>(StringFormat("reduceOp[%u] is invalid", reduceOp));
      34              :     }
      35            6 :     return reduceTypeMap[reduceOp];
      36              : }
      37              : 
      38          185 : MAKE_ENUM(
      39              :     TransferType, WRITE, WRITE_REDUCE, WRITE_WITH_NOTIFY, WRITE_REDUCE_WITH_NOTIFY, READ, READ_REDUCE, NOTIFY_RECORD)
      40              : 
      41              : class BaseTransportLiteImpl {
      42              : public:
      43          277 :     BaseTransportLiteImpl() = default;
      44              : 
      45          277 :     virtual ~BaseTransportLiteImpl() = default;
      46              : 
      47            0 :     virtual std::string Describe() const { return "BaseTransportLiteImpl"; }
      48              : 
      49              :     struct TransferOp {
      50              :         TransferType transType;
      51              :         ReduceIn reduceIn;
      52              :     };
      53              : 
      54            0 :     virtual Buffer GetRmtBuffer(u32 index)
      55              :     {
      56              :         (void)index;
      57            0 :         return Buffer(0, 0);
      58              :     }
      59              : 
      60            0 :     virtual HcclResult BuildLocRmaBufferLite(const uintptr_t addr, const size_t size, RmaBufferLite& rmaBufferLite)
      61              :     {
      62              :         (void)addr;
      63              :         (void)size;
      64            0 :         rmaBufferLite = RmaBufferLite(0, 0, 0, 0);
      65            0 :         return HCCL_SUCCESS;
      66              :     }
      67              : 
      68            0 :     virtual void Post(u32 index, const StreamLite& stream)
      69              :     {
      70              :         (void)index;
      71              :         (void)stream;
      72            0 :     }
      73              : 
      74            0 :     virtual void Wait(u32 index, const StreamLite& stream)
      75              :     {
      76              :         (void)index;
      77              :         (void)stream;
      78            0 :     }
      79              : 
      80            0 :     virtual void WaitWithTimeout(u32 index, const StreamLite& stream, u32 timeout)
      81              :     {
      82              :         (void)index;
      83              :         (void)stream;
      84              :         (void)timeout;
      85            0 :     }
      86              : 
      87            0 :     virtual void Read(const RmaBufferLite& loc, const Buffer& rmt, const StreamLite& stream)
      88              :     {
      89              :         (void)loc;
      90              :         (void)rmt;
      91              :         (void)stream;
      92            0 :     }
      93              : 
      94            0 :     virtual void Write(const RmaBufferLite& loc, const Buffer& rmt, const StreamLite& stream)
      95              :     {
      96              :         (void)loc;
      97              :         (void)rmt;
      98              :         (void)stream;
      99            0 :     }
     100              : 
     101              :     virtual void
     102            0 :     ReadReduce(const RmaBufferLite& loc, const Buffer& rmt, const ReduceIn& reduceIn, const StreamLite& stream)
     103              :     {
     104              :         (void)loc;
     105              :         (void)rmt;
     106              :         (void)reduceIn;
     107              :         (void)stream;
     108            0 :     }
     109              : 
     110              :     virtual void
     111            0 :     WriteReduce(const RmaBufferLite& loc, const Buffer& rmt, const ReduceIn& reduceIn, const StreamLite& stream)
     112              :     {
     113              :         (void)loc;
     114              :         (void)rmt;
     115              :         (void)reduceIn;
     116              :         (void)stream;
     117            0 :     }
     118              : 
     119            0 :     virtual void WriteWithNotify(
     120              :         const RmaBufferLite& loc, const Buffer& rmt, const WithNotifyIn& withNotify, const StreamLite& stream)
     121              :     {
     122              :         (void)loc;
     123              :         (void)rmt;
     124              :         (void)withNotify;
     125              :         (void)stream;
     126            0 :     }
     127              : 
     128            0 :     virtual void WriteReduceWithNotify(
     129              :         const RmaBufferLite& loc, const Buffer& rmt, const ReduceIn& reduceIn, const WithNotifyIn& withNotify,
     130              :         const StreamLite& stream)
     131              :     {
     132              :         (void)loc;
     133              :         (void)rmt;
     134              :         (void)reduceIn;
     135              :         (void)withNotify;
     136              :         (void)stream;
     137            0 :     }
     138              : 
     139            0 :     virtual void BatchOneSidedWrite(
     140              :         const std::vector<RmaBufSliceLite>& loc, const std::vector<RmtRmaBufSliceLite>& rmt, const StreamLite& stream)
     141              :     {
     142              :         (void)loc;
     143              :         (void)rmt;
     144              :         (void)stream;
     145            0 :     }
     146              : 
     147            0 :     virtual void BatchOneSidedRead(
     148              :         const std::vector<RmaBufSliceLite>& loc, const std::vector<RmtRmaBufSliceLite>& rmt, const StreamLite& stream)
     149              :     {
     150              :         (void)loc;
     151              :         (void)rmt;
     152              :         (void)stream;
     153            0 :     }
     154              : 
     155            2 :     virtual void BatchTransfer(
     156              :         const std::vector<RmaBufferLite>& loc, const std::vector<Buffer>& rmt,
     157              :         const std::vector<TransferOp>& transferOp, const StreamLite& stream)
     158              :     {
     159              :         (void)loc;
     160              :         (void)rmt;
     161              :         (void)transferOp;
     162              :         (void)stream;
     163            2 :     }
     164              : 
     165            0 :     virtual void Drain(const StreamLite& stream) { (void)stream; }
     166              : 
     167            0 :     virtual HcclResult Fence() { return HCCL_SUCCESS; }
     168              : 
     169              : protected:
     170              : private:
     171              : };
     172              : 
     173              : } // namespace Hccl
     174              : #endif
        

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