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1 : /**
2 : * Copyright (c) 2025 Huawei Technologies Co., Ltd.
3 : * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4 : * CANN Open Software License Agreement Version 2.0 (the "License").
5 : * Please refer to the License for details. You may not use this file except in compliance with the License.
6 : * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7 : * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8 : * See LICENSE in the root of the software repository for the full text of the License.
9 : */
10 :
11 : #ifndef HCCLV2_CCU_INSTRUCTION_ALL_REDUCE_NHR_1D_H_
12 : #define HCCLV2_CCU_INSTRUCTION_ALL_REDUCE_NHR_1D_H_
13 :
14 : #include "template_utils.h"
15 : #include "instruction.h"
16 : #include "ins_queue.h"
17 : #include "ccu_context_utils.h"
18 : #include "ccu_ctx_signature.h"
19 : #include "ccu_ins.h"
20 : #include "ccu_rank_group.h"
21 :
22 : namespace Hccl {
23 :
24 : using NHRStepInfo = struct NHRStepInfoDef {
25 : u32 step = 0;
26 : u32 myRank = 0;
27 : u32 nSlices;
28 : u32 toRank = 0;
29 : u32 fromRank = 0;
30 : std::vector<u32> txSliceIdxs;
31 : std::vector<u32> rxSliceIdxs;
32 :
33 0 : NHRStepInfoDef() : nSlices(0)
34 : {
35 0 : }
36 : };
37 :
38 : // 为AllReduceNHR1D实现的CCUIns、CCUCtxArg与CCUTaskArg
39 : class CcuCtxArgAllReduceNHR1D : public CcuCtxArg {
40 : public:
41 0 : explicit CcuCtxArgAllReduceNHR1D(const std::vector<uint64_t> &dimSize, uint32_t rankId, uint32_t axisId,
42 : uint32_t axisSize, const std::vector<NHRStepInfo> stepInfoVector,
43 : const std::map<u32, u32> indexMap, const CollAlgOperator &op,
44 : const std::vector<std::vector<RankId>> &tempVTopo)
45 0 : : dimSize_(dimSize), rankId_(rankId), axisId_(axisId), axisSize_(axisSize), stepInfoVector_(stepInfoVector),
46 0 : indexMap_(indexMap), op_(op), tempVTopo_(tempVTopo)
47 : {
48 0 : }
49 0 : CcuCtxSignature GetCtxSignature() const override
50 : {
51 0 : CcuCtxSignature signature;
52 0 : GenerateCcuCtxSignature(signature, CcuInstType::CCU_ALLREDUCE_NHR_1D_MEM2MEM, op_, tempVTopo_);
53 0 : return signature;
54 0 : }
55 : std::vector<uint64_t> dimSize_;
56 : uint32_t rankId_;
57 : uint32_t axisId_;
58 : uint32_t axisSize_;
59 : std::vector<NHRStepInfo> stepInfoVector_;
60 : std::map<u32, u32> indexMap_;
61 : CollAlgOperator op_;
62 : std::vector<std::vector<RankId>> tempVTopo_;
63 : };
64 :
65 : class CcuTaskArgAllReduceNHR1D : public CcuTaskArg {
66 : public:
67 0 : explicit CcuTaskArgAllReduceNHR1D(uint64_t inputAddr, uint64_t outputAddr, uint64_t token,
68 : uint64_t isInputOutputEqual, uint64_t die0Size, uint64_t die1Size,
69 : uint64_t die0SliceSize, uint64_t die1SliceSize,
70 : uint64_t die0LastSliceSize, uint64_t die1LastSliceSize)
71 0 : : inputAddr_(inputAddr), outputAddr_(outputAddr), token_(token), isInputOutputEqual_(isInputOutputEqual),
72 0 : die0Size_(die0Size), die1Size_(die1Size), die0SliceSize_(die0SliceSize), die1SliceSize_(die1SliceSize),
73 0 : die0LastSliceSize_(die0LastSliceSize), die1LastSliceSize_(die1LastSliceSize)
74 : {
75 0 : }
76 :
77 : uint64_t inputAddr_;
78 : uint64_t outputAddr_;
79 : uint64_t token_;
80 : uint64_t isInputOutputEqual_;
81 : uint64_t die0Size_;
82 : uint64_t die1Size_;
83 : uint64_t die0SliceSize_;
84 : uint64_t die1SliceSize_;
85 : uint64_t die0LastSliceSize_;
86 : uint64_t die1LastSliceSize_;
87 : };
88 :
89 : class CcuInstructionAllReduceNHR1D : public CcuInstruction {
90 : public:
91 0 : CcuInstructionAllReduceNHR1D() : CcuInstruction()
92 : {
93 0 : }
94 :
95 0 : void Init(uint32_t rankId, uint64_t inputAddr, uint64_t outputAddr, uint32_t axisId, uint32_t axisSize,
96 : uint64_t die0Size, uint64_t die1Size, uint64_t die0SliceSize, uint64_t die1SliceSize,
97 : uint64_t die0LastSliceSize, uint64_t die1LastSliceSize, std::vector<NHRStepInfo> stepInfoVector,
98 : std::map<u32, u32> indexMap, uint64_t token, uint64_t isInputOutputEqual, CollAlgOperator &op,
99 : std::vector<std::vector<RankId>> &tempVTopo)
100 : {
101 0 : u32 maxDimNum = 1;
102 0 : if (tempVTopo.size() != maxDimNum) {
103 0 : THROW<InvalidParamsException>(StringFormat(
104 : "[CcuInstructionAllReduceNHR1D] tempVTopo size is not 1, size is [%zu].", tempVTopo.size()));
105 : }
106 0 : dimSize_.push_back(tempVTopo[0].size());
107 0 : op_ = op;
108 0 : rankId_ = rankId;
109 0 : inputAddr_ = inputAddr;
110 0 : outputAddr_ = outputAddr;
111 0 : axisId_ = axisId;
112 0 : axisSize_ = axisSize;
113 0 : die0SliceSize_ = die0SliceSize;
114 0 : die1SliceSize_ = die1SliceSize;
115 0 : die0LastSliceSize_ = die0LastSliceSize;
116 0 : die1LastSliceSize_ = die1LastSliceSize;
117 0 : die0Size_ = die0Size;
118 0 : die1Size_ = die1Size;
119 0 : stepInfoVector_ = stepInfoVector;
120 0 : indexMap_ = indexMap;
121 0 : isInputOutputEqual_ = isInputOutputEqual;
122 0 : tempVTopo_ = tempVTopo;
123 0 : token_ = token;
124 0 : return;
125 : }
126 :
127 0 : CcuInstType GetInstType() const override
128 : {
129 0 : HCCL_INFO("CcuInstructionAllReduceNHR1D instype is CCU_ALLREDUCE_NHR_1D_MEM2MEM.");
130 0 : return instType_;
131 : }
132 :
133 0 : std::string Describe() const override
134 : {
135 0 : return StringFormat("CcuInstructionAllReduceNHR1D rankId [%u], instType[%s]", rankId_,
136 0 : instType_.Describe().c_str());
137 : }
138 :
139 0 : std::unique_ptr<CcuCtxArg> GetCtxArg() const override
140 : {
141 0 : return std::make_unique<CcuCtxArgAllReduceNHR1D>(dimSize_, rankId_, axisId_, axisSize_, stepInfoVector_,
142 0 : indexMap_, op_, tempVTopo_);
143 : }
144 :
145 : void SetInstType(CcuInstType instType)
146 : {
147 : instType_ = instType;
148 : }
149 :
150 0 : std::unique_ptr<CcuTaskArg> GetTaskArg() const override
151 : {
152 0 : return std::make_unique<CcuTaskArgAllReduceNHR1D>(inputAddr_, outputAddr_, token_, isInputOutputEqual_,
153 0 : die0Size_, die1Size_, die0SliceSize_, die1SliceSize_,
154 0 : die0LastSliceSize_, die1LastSliceSize_);
155 : }
156 :
157 : private:
158 : CcuInstType instType_ = CcuInstType::CCU_ALLREDUCE_NHR_1D_MEM2MEM;
159 : std::vector<uint64_t> dimSize_;
160 : uint32_t rankId_{0};
161 : uint32_t axisId_{0};
162 : uint32_t axisSize_{0};
163 :
164 : uint64_t die0Size_{0};
165 : uint64_t die1Size_{0};
166 : uint64_t inputAddr_{0};
167 : uint64_t outputAddr_{0};
168 : uint64_t die1SliceSize_{0};
169 : uint64_t die0SliceSize_{0};
170 : uint64_t die0LastSliceSize_{0};
171 : uint64_t die1LastSliceSize_{0};
172 : uint64_t isInputOutputEqual_{0};
173 :
174 : std::vector<NHRStepInfo> stepInfoVector_;
175 : std::map<u32, u32> indexMap_;
176 : uint64_t token_{0};
177 : CollAlgOperator op_;
178 : std::vector<std::vector<RankId>> tempVTopo_;
179 : };
180 : } // namespace Hccl
181 :
182 : #endif // HCCLV2_CCU_INSTRUCTION_ALL_REDUCE_NHR_1D_H_
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