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1 : /**
2 : * Copyright (c) 2025 Huawei Technologies Co., Ltd.
3 : * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4 : * CANN Open Software License Agreement Version 2.0 (the "License").
5 : * Please refer to the License for details. You may not use this file except in compliance with the License.
6 : * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7 : * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8 : * See LICENSE in the root of the software repository for the full text of the License.
9 : */
10 :
11 : #ifndef HCCLV2_CCU_INSTRUCTION_ALL_GATHER_NHR_1D_H_
12 : #define HCCLV2_CCU_INSTRUCTION_ALL_GATHER_NHR_1D_H_
13 :
14 : #include "template_utils.h"
15 : #include "instruction.h"
16 : #include "ins_queue.h"
17 : #include "ccu_context_utils.h"
18 : #include "ccu_ctx_signature.h"
19 : #include "ccu_ins.h"
20 : #include "ccu_rank_group.h"
21 :
22 : namespace Hccl {
23 :
24 : using NHRStepInfo = struct NHRStepInfoDef {
25 : u32 step = 0;
26 : u32 myRank = 0;
27 : u32 nSlices;
28 : u32 toRank = 0;
29 : u32 fromRank = 0;
30 : std::vector<u32> txSliceIdxs;
31 : std::vector<u32> rxSliceIdxs;
32 :
33 0 : NHRStepInfoDef() : nSlices(0)
34 : {
35 0 : }
36 : };
37 :
38 : // 为AllGatherNHR1D实现的CCUIns、CCUCtxArg与CCUTaskArg
39 : class CcuCtxArgAllGatherNHR1D : public CcuCtxArg {
40 : public:
41 0 : explicit CcuCtxArgAllGatherNHR1D(const std::vector<uint64_t> &dimSize, uint32_t rankId, uint32_t axisId, uint32_t axisSize,
42 : const std::vector<NHRStepInfo> stepInfoVector,
43 : const std::map<u32, u32> indexMap, const CollAlgOperator &op,
44 : const std::vector<std::vector<RankId>> &tempVTopo)
45 0 : : dimSize_(dimSize), rankId_(rankId), axisId_(axisId), axisSize_(axisSize), stepInfoVector_(stepInfoVector),
46 0 : indexMap_(indexMap), op_(op), tempVTopo_(tempVTopo)
47 : {
48 0 : }
49 0 : CcuCtxSignature GetCtxSignature() const override
50 : {
51 0 : CcuCtxSignature signature;
52 0 : GenerateCcuCtxSignature(signature, CcuInstType::CCU_ALLGATHER_NHR_1D_MEM2MEM, op_, tempVTopo_);
53 0 : return signature;
54 0 : }
55 : std::vector<uint64_t> dimSize_;
56 : uint64_t rankId_;
57 : uint64_t axisId_;
58 : uint64_t axisSize_;
59 : std::vector<NHRStepInfo> stepInfoVector_;
60 : std::map<u32, u32> indexMap_;
61 : CollAlgOperator op_;
62 : std::vector<std::vector<RankId>> tempVTopo_;
63 : };
64 :
65 : class CcuTaskArgAllGatherNHR1D : public CcuTaskArg {
66 : public:
67 0 : explicit CcuTaskArgAllGatherNHR1D(uint64_t inputAddr, uint64_t outputAddr, uint64_t token, uint64_t die0Size,
68 : uint64_t die1Size, uint64_t repeatNum, uint64_t inputSliceStride,
69 : uint64_t outputSliceStride, uint64_t inputRepeatStride,
70 : uint64_t outputRepeatStride, uint64_t isInputOutputEqual)
71 0 : : inputAddr_(inputAddr), outputAddr_(outputAddr), token_(token), die0Size_(die0Size), die1Size_(die1Size),
72 0 : repeatNum_(repeatNum), inputSliceStride_(inputSliceStride), outputSliceStride_(outputSliceStride),
73 0 : inputRepeatStride_(inputRepeatStride), outputRepeatStride_(outputRepeatStride),isInputOutputEqual_(isInputOutputEqual)
74 : {
75 0 : }
76 :
77 : uint64_t inputAddr_;
78 : uint64_t outputAddr_;
79 : uint64_t token_;
80 : uint64_t die0Size_;
81 : uint64_t die1Size_;
82 : uint64_t repeatNum_;
83 : uint64_t inputSliceStride_;
84 : uint64_t outputSliceStride_;
85 : uint64_t inputRepeatStride_;
86 : uint64_t outputRepeatStride_;
87 : uint64_t isInputOutputEqual_;
88 : };
89 :
90 : class CcuInstructionAllGatherNHR1D : public CcuInstruction {
91 : public:
92 0 : CcuInstructionAllGatherNHR1D() : CcuInstruction()
93 : {
94 0 : }
95 :
96 0 : void Init(uint32_t rankId, uint64_t inputAddr, uint64_t outputAddr, uint64_t axisId, uint32_t axisSize,
97 : uint64_t die0Size, uint64_t die1Size, uint64_t repeatNum, uint64_t inputSliceStride,
98 : uint64_t outputSliceStride, uint64_t inputRepeatStride, uint64_t outputRepeatStride,
99 : std::vector<NHRStepInfo> stepInfoVector, std::map<u32, u32> indexMap, uint64_t token,
100 : uint64_t isInputOutputEqual, CollAlgOperator &op, std::vector<std::vector<RankId>> &tempVTopo)
101 : {
102 0 : u32 maxDimNum = 1;
103 0 : if (tempVTopo.size() != maxDimNum) {
104 0 : THROW<InvalidParamsException>(StringFormat(
105 : "[CcuInstructionAllGatherNHR1D] tempVTopo size is not 1, size is [%zu].", tempVTopo.size()));
106 : }
107 0 : dimSize_.push_back(tempVTopo[0].size());
108 0 : rankId_ = rankId;
109 0 : inputAddr_ = inputAddr;
110 0 : outputAddr_ = outputAddr;
111 0 : axisId_ = axisId;
112 0 : axisSize_ = axisSize;
113 0 : die0Size_ = die0Size;
114 0 : die1Size_ = die1Size;
115 0 : repeatNum_ = repeatNum;
116 0 : inputSliceStride_ = inputSliceStride;
117 0 : outputSliceStride_ = outputSliceStride;
118 0 : inputRepeatStride_ = inputRepeatStride;
119 0 : outputRepeatStride_ = outputRepeatStride;
120 0 : stepInfoVector_ = stepInfoVector;
121 0 : indexMap_ = indexMap;
122 0 : token_ = token;
123 0 : isInputOutputEqual_ = isInputOutputEqual;
124 0 : op_ = op;
125 0 : tempVTopo_ = tempVTopo;
126 0 : return;
127 : }
128 :
129 0 : CcuInstType GetInstType() const override
130 : {
131 0 : HCCL_INFO("CcuInstructionAllGatherNHR1D instype is CCU_ALLGATHER_NHR_1D_MEM2MEM.");
132 0 : return instType_;
133 : }
134 :
135 0 : std::string Describe() const override
136 : {
137 0 : return StringFormat("CcuInstructionAllGatherNHR1D rankId [%u], instType[%s]", rankId_,
138 0 : instType_.Describe().c_str());
139 : }
140 :
141 0 : std::unique_ptr<CcuCtxArg> GetCtxArg() const override
142 : {
143 0 : return std::make_unique<CcuCtxArgAllGatherNHR1D>(dimSize_, rankId_, axisId_, axisSize_, stepInfoVector_,
144 0 : indexMap_, op_, tempVTopo_);
145 : }
146 :
147 : void SetInstType(CcuInstType instType)
148 : {
149 : instType_ = instType;
150 : }
151 :
152 0 : std::unique_ptr<CcuTaskArg> GetTaskArg() const override
153 : {
154 0 : return std::make_unique<CcuTaskArgAllGatherNHR1D>(inputAddr_, outputAddr_, token_, die0Size_, die1Size_,
155 0 : repeatNum_, inputSliceStride_, outputSliceStride_,
156 0 : inputRepeatStride_, outputRepeatStride_, isInputOutputEqual_);
157 : }
158 :
159 : private:
160 : std::vector<std::vector<RankId>> tempVTopo_;
161 : CcuInstType instType_ = CcuInstType::CCU_ALLGATHER_NHR_1D_MEM2MEM;
162 : std::vector<uint64_t> dimSize_;
163 : uint32_t rankId_{0};
164 : uint32_t axisId_{0};
165 : uint32_t axisSize_{0};
166 : uint64_t inputAddr_{0};
167 : uint64_t outputAddr_{0};
168 : uint64_t die1Size_{0};
169 : uint64_t die0Size_{0};
170 : uint64_t repeatNum_{0};
171 : uint64_t inputSliceStride_{0};
172 : uint64_t outputSliceStride_{0};
173 : uint64_t inputRepeatStride_{0};
174 : uint64_t outputRepeatStride_{0};
175 : uint64_t isInputOutputEqual_{0};
176 : std::vector<NHRStepInfo> stepInfoVector_;
177 : std::map<u32, u32> indexMap_;
178 : uint64_t token_{0};
179 : CollAlgOperator op_;
180 : };
181 : } // namespace Hccl
182 :
183 : #endif // HCCLV2_CCU_INSTRUCTION_ALL_GATHER_NHR_1D_H_
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