Line data Source code
1 : /**
2 : * Copyright (c) 2025 Huawei Technologies Co., Ltd.
3 : * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4 : * CANN Open Software License Agreement Version 2.0 (the "License").
5 : * Please refer to the License for details. You may not use this file except in compliance with the License.
6 : * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7 : * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8 : * See LICENSE in the root of the software repository for the full text of the License.
9 : */
10 :
11 : #include "coll_all_reduce_ars_for_910_93_executor.h"
12 :
13 : namespace hccl {
14 0 : CollAllReduceARSFor91093Executor::CollAllReduceARSFor91093Executor(
15 0 : const HcclDispatcher dispatcher, std::unique_ptr<TopoMatcher> &topoMatcher)
16 0 : : CollAllReduceRingFor91093Executor(dispatcher, topoMatcher)
17 : {
18 0 : DMAReduceFlag_ = false;
19 0 : }
20 :
21 0 : HcclResult CollAllReduceARSFor91093Executor::CalcStreamNum(u32& streamNum)
22 : {
23 0 : u32 totalStreamNum = LEVEL0_PLANE_NUM_IN_NPRING_SINGLE;
24 0 : if ((intraRingSize_ > FACTOR_TWO) && topoAttr_.isARSDoubleRing) {
25 0 : totalStreamNum = LEVEL0_PLANE_NUM_IN_NPRING_DOUBLE;
26 : }
27 0 : streamNum = totalStreamNum - 1;
28 0 : HCCL_INFO("[CalcStreamNum] tag[%s] streamNum[%u]", tag_.c_str(), streamNum);
29 0 : return HCCL_SUCCESS;
30 : }
31 :
32 0 : HcclResult CollAllReduceARSFor91093Executor::CalcLevel0CommInfo(TransportMemType inputType,
33 : TransportMemType outputType,
34 : std::vector<LevelNSubCommTransport>& opTransport)
35 : {
36 0 : CHK_RET(SetCommInfoForARS(intraRingSize_));
37 0 : CommParaInfo commParaLevel0(COMM_LEVEL0, CommType::COMM_TAG_RING_INNER);
38 0 : CHK_RET(CalcCommPlaneInfo(tag_, commParaLevel0, opTransport[COMM_LEVEL0], inputType, outputType));
39 0 : CommParaInfo commARSIntra(COMM_LEVEL0_LOGICAL, CommType::COMM_TAG_RING_INNER);
40 0 : CHK_RET(CalcCommPlaneInfo(tag_, commARSIntra, opTransport[COMM_LEVEL0_LOGICAL], inputType, outputType));
41 0 : return HCCL_SUCCESS;
42 0 : }
43 :
44 0 : HcclResult CollAllReduceARSFor91093Executor::CalcLevel1CommInfo(TransportMemType inputType,
45 : TransportMemType outputType,
46 : std::vector<LevelNSubCommTransport>& opTransport)
47 : {
48 0 : if (algType_.algoLevel1 == AlgTypeLevel1::ALG_LEVEL1_RING) {
49 0 : HCCL_DEBUG("[CalcARSInterCommInfo] use ring comm type");
50 0 : CommParaInfo commARSInter(COMM_LEVEL1_LOGICAL, CommType::COMM_TAG_RING_INNER);
51 0 : CHK_RET(CalcCommPlaneInfo(tag_, commARSInter, opTransport[COMM_LEVEL1_LOGICAL], inputType, outputType));
52 0 : } else if(algType_.algoLevel1 == AlgTypeLevel1::ALG_LEVEL1_NB) {
53 0 : HCCL_DEBUG("[CalcARSInterCommInfo] use NB comm type");
54 0 : CommParaInfo commARSInter(COMM_LEVEL1_LOGICAL, CommType::COMM_TAG_NONUNIFORM_BRUCK);
55 0 : CHK_RET(CalcCommPlaneInfo(tag_, commARSInter, opTransport[COMM_LEVEL1_LOGICAL], inputType, outputType));
56 0 : } else if(algType_.algoLevel1 == AlgTypeLevel1::ALG_LEVEL1_NHR_V1) {
57 0 : HCCL_DEBUG("[CalcARSInterCommInfo] use NHR-V1 comm type");
58 0 : CommParaInfo commARSInter(COMM_LEVEL1_LOGICAL, CommType::COMM_TAG_NONUNIFORM_HIERARCHICAL_RING_V1);
59 0 : CHK_RET(CalcCommPlaneInfo(tag_, commARSInter, opTransport[COMM_LEVEL1_LOGICAL], inputType, outputType));
60 0 : }
61 : else {
62 0 : HCCL_DEBUG("[CalcARSInterCommInfo] use NHR comm type");
63 0 : CommParaInfo commARSInter(COMM_LEVEL1_LOGICAL, CommType::COMM_TAG_NONUNIFORM_HIERARCHICAL_RING);
64 0 : CHK_RET(CalcCommPlaneInfo(tag_, commARSInter, opTransport[COMM_LEVEL1_LOGICAL], inputType, outputType));
65 0 : }
66 0 : return HCCL_SUCCESS;
67 : }
68 :
69 0 : HcclResult CollAllReduceARSFor91093Executor::GetLevelCommInfo()
70 : {
71 0 : logicalLevel0plane_ = COMM_LEVEL0_LOGICAL;
72 0 : CHK_RET(CheckCommSize(logicalLevel0plane_, COMM_INDEX_0 + 1));
73 0 : logicalLevel0CommInfo_ = GetSubCommInfo(logicalLevel0plane_, COMM_INDEX_0);
74 0 : logicalLevel1plane_ = COMM_LEVEL1_LOGICAL;
75 0 : CHK_RET(CheckCommSize(logicalLevel1plane_, logicalLevel0CommInfo_.localRank + 1));
76 0 : logicalLevel1CommInfo_ = GetSubCommInfo(logicalLevel1plane_, logicalLevel0CommInfo_.localRank);
77 0 : return HCCL_SUCCESS;
78 : }
79 :
80 0 : HcclResult CollAllReduceARSFor91093Executor::CalcOptimalIntraRing(const OpParam& param)
81 : {
82 0 : intraRingSize_ = CalcOptimalIntraRingsize(param.DataDes.count, param.DataDes.dataType, HcclCMDType::HCCL_CMD_ALLREDUCE);
83 0 : HCCL_INFO("intraRingSize_[%u]",intraRingSize_);
84 0 : return HCCL_SUCCESS;
85 : }
86 : REGISTER_EXEC("AllReduceARSFor91093Executor", AllReduceARSFor91093, CollAllReduceARSFor91093Executor);
87 : }
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