Line data Source code
1 : /**
2 : * Copyright (c) 2025 Huawei Technologies Co., Ltd.
3 : * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4 : * CANN Open Software License Agreement Version 2.0 (the "License").
5 : * Please refer to the License for details. You may not use this file except in compliance with the License.
6 : * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7 : * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8 : * See LICENSE in the root of the software repository for the full text of the License.
9 : */
10 :
11 : #include "alg_template_register.h"
12 : #include "all_reduce_opbase_pipeline.h"
13 :
14 : constexpr u32 STEP_OFFSET_TWO = 2;
15 :
16 :
17 : namespace hccl {
18 0 : AllReduceOpbasePipeline::AllReduceOpbasePipeline(const HcclDispatcher dispatcher) : AlgTemplateBase(dispatcher)
19 0 : {}
20 :
21 0 : AllReduceOpbasePipeline::~AllReduceOpbasePipeline()
22 0 : {}
23 :
24 0 : HcclResult AllReduceOpbasePipeline::Prepare(u64 reduceAttrBitMap, HcomCollOpInfo *opInfo)
25 : {
26 0 : reduceAttr_ = reduceAttrBitMap;
27 0 : return HCCL_SUCCESS;
28 : }
29 :
30 0 : HcclResult AllReduceOpbasePipeline::MainWaitSub()
31 : {
32 0 : u32 subStreamNum = intraRankSize_;
33 0 : for (u32 signalIndex = 0; signalIndex < subStreamNum; signalIndex++) {
34 0 : CHK_RET(LocalNotify::Wait(stream_, dispatcher_, streamNotifyMain_[signalIndex], INVALID_VALUE_STAGE));
35 : }
36 0 : return HCCL_SUCCESS;
37 : }
38 :
39 0 : HcclResult AllReduceOpbasePipeline::SubRecordMain()
40 : {
41 0 : u32 subStreamNum = intraRankSize_;
42 0 : for (u32 streamIndex = 0; streamIndex < subStreamNum; streamIndex++) {
43 0 : CHK_RET(LocalNotify::Post(subStreams_[streamIndex], dispatcher_, streamNotifyMain_[streamIndex], -1));
44 : }
45 0 : return HCCL_SUCCESS;
46 : }
47 :
48 0 : HcclResult AllReduceOpbasePipeline::MainRecordSub()
49 : {
50 0 : u32 subStreamNum = intraRankSize_;
51 0 : for (u32 signalIndex = 0; signalIndex < subStreamNum; signalIndex++) {
52 0 : CHK_RET(LocalNotify::Post(stream_, dispatcher_, streamNotifySub_[signalIndex], -1));
53 : }
54 0 : return HCCL_SUCCESS;
55 : }
56 :
57 0 : HcclResult AllReduceOpbasePipeline::SubWaitMain()
58 : {
59 0 : u32 subStreamNum = intraRankSize_;
60 0 : for (u32 streamIndex = 0; streamIndex < subStreamNum; streamIndex++) {
61 0 : CHK_RET(LocalNotify::Wait(subStreams_[streamIndex], dispatcher_, streamNotifySub_[streamIndex],
62 : INVALID_VALUE_STAGE));
63 : }
64 0 : return HCCL_SUCCESS;
65 : }
66 :
67 0 : HcclResult AllReduceOpbasePipeline::RunReduceScatterIntraServer(u32 step)
68 : {
69 0 : u32 dmaMemSliceNum = dmaMem_.size();
70 0 : u32 dmaMemSliceId = step % dmaMemSliceNum;
71 0 : for (u32 i = 1; i < intraRankSize_; i++) {
72 0 : u32 remIntraRankId = (intraRankId_ + i) % intraRankSize_;
73 0 : CHK_RET(intraLinks_[remIntraRankId]->TxAck(subStreams_[i - 1]));
74 0 : CHK_RET(intraLinks_[remIntraRankId]->RxAck(subStreams_[i - 1]));
75 0 : void* remoteMemPtr = nullptr;
76 0 : CHK_RET(intraLinks_[remIntraRankId]->GetRemoteMem(dmaMemSliceId==1?
77 : UserMemType::OUTPUT_MEM: UserMemType::INPUT_MEM, &remoteMemPtr));
78 0 : u32 sliceId = ((interRankId_ + step + 1) % interRankSize_) * intraRankSize_ + remIntraRankId;
79 0 : u64 srcOffset = sliceId * memSliceSize_;
80 0 : u64 offset = srcOffset % HCCL_MIN_SLICE_ALIGN_910B;
81 0 : u64 dataSize = memSliceSize_;
82 0 : u64 dataCount = sliceCount_;
83 0 : if (sliceId == (interRankSize_ * intraRankSize_ - 1)) {
84 0 : dataSize = lastSliceSize_;
85 0 : dataCount = lastSliceCount_;
86 : }
87 0 : DeviceMem src = DeviceMem::create(static_cast<u8 *>(usrInMem_) + srcOffset, dataSize);
88 0 : DeviceMem dst = DeviceMem::create(static_cast<u8 *>(remoteMemPtr) + offset, dataSize);
89 :
90 0 : CHK_RET(HcclReduceAsync(dispatcher_, src.ptr(), dataCount, dataType_, reductionOp_,
91 : subStreams_[i - 1], dst.ptr(), intraLinks_[remIntraRankId]->GetRemoteRank(),
92 : intraLinks_[remIntraRankId]->GetLinkType(), INLINE_REDUCE_BIT));
93 :
94 0 : CHK_RET(intraLinks_[remIntraRankId]->TxDataSignal(subStreams_[i - 1]));
95 0 : CHK_RET(intraLinks_[remIntraRankId]->RxDataSignal(subStreams_[i - 1]));
96 0 : }
97 0 : return HCCL_SUCCESS;
98 : }
99 :
100 0 : HcclResult AllReduceOpbasePipeline::RunAllGatherIntraServer(u32 step)
101 : {
102 0 : u32 dmaMemSliceNum = dmaMem_.size();
103 0 : u32 dmaMemSliceId = (interRankSize_ + step - 1) % dmaMemSliceNum;
104 0 : for (u32 i = 1; i < intraRankSize_; i++) {
105 0 : u32 remIntraRankId = (intraRankId_ + i) % intraRankSize_;
106 0 : CHK_RET(intraLinks_[remIntraRankId]->TxAck(subStreams_[i - 1]));
107 0 : CHK_RET(intraLinks_[remIntraRankId]->RxAck(subStreams_[i - 1]));
108 0 : void* remoteMemPtr = nullptr;
109 0 : CHK_RET(intraLinks_[remIntraRankId]->GetRemoteMem(dmaMemSliceId==1?
110 : UserMemType::OUTPUT_MEM: UserMemType::INPUT_MEM, &remoteMemPtr));
111 0 : u32 sliceId = ((interRankId_ + step) % interRankSize_) * intraRankSize_ + remIntraRankId;
112 0 : u64 dstOffset = sliceId * memSliceSize_;
113 0 : u64 offset = dstOffset % HCCL_MIN_SLICE_ALIGN_910B;
114 0 : u64 dataSize = memSliceSize_;
115 0 : if (sliceId == (interRankSize_ * intraRankSize_ - 1)) {
116 0 : dataSize = lastSliceSize_;
117 : }
118 0 : DeviceMem src = DeviceMem::create(static_cast<u8 *>(remoteMemPtr) + offset, dataSize);
119 0 : DeviceMem dst = DeviceMem::create(static_cast<u8 *>(usrOutMem_) + dstOffset, dataSize);
120 0 : CHK_RET(HcclD2DMemcpyAsync(dispatcher_, dst, src, subStreams_[i - 1],
121 : intraLinks_[remIntraRankId]->GetRemoteRank(), intraLinks_[remIntraRankId]->GetLinkType()));
122 0 : CHK_RET(intraLinks_[remIntraRankId]->TxDataSignal(subStreams_[i - 1]));
123 0 : CHK_RET(intraLinks_[remIntraRankId]->RxDataSignal(subStreams_[i - 1]));
124 0 : }
125 0 : return HCCL_SUCCESS;
126 : }
127 :
128 0 : HcclResult AllReduceOpbasePipeline::RunReduceScatterInterServer(u32 step,
129 : const LINK &prevInterLink,
130 : const LINK &nextInterLink)
131 : {
132 0 : CHK_RET(prevInterLink->TxAck(stream_));
133 0 : CHK_RET(nextInterLink->RxAck(stream_));
134 0 : u32 dmaMemSliceNum = dmaMem_.size();
135 0 : u32 rxDMAMemSliceId = (step + 1) % dmaMemSliceNum;
136 0 : u32 txDMAMemSliceId = step % dmaMemSliceNum;
137 0 : UserMemType srcMemType = txDMAMemSliceId == 1? UserMemType::OUTPUT_MEM: UserMemType::INPUT_MEM;
138 0 : UserMemType dstMemType = rxDMAMemSliceId == 1? UserMemType::OUTPUT_MEM: UserMemType::INPUT_MEM;
139 0 : u32 txSliceId = ((interRankId_ + 1 + step) % interRankSize_) * intraRankSize_ + intraRankId_;
140 0 : u64 sliceMemOffset = memSliceSize_ * txSliceId;
141 0 : u64 offset = sliceMemOffset % HCCL_MIN_SLICE_ALIGN_910B;
142 0 : void* txLocalAddr = static_cast<u8 *>(dmaMem_[txDMAMemSliceId].ptr()) + offset;
143 0 : u64 txDataSize = memSliceSize_;
144 0 : if (txSliceId == (interRankSize_ * intraRankSize_ - 1)) {
145 0 : txDataSize = lastSliceSize_;
146 : }
147 0 : DeviceMem srcMem = DeviceMem::create(txLocalAddr, txDataSize);
148 0 : CHK_RET(senderInfo_->run(nextInterLink, offset, srcMem, stream_, dstMemType));
149 0 : HCCL_DEBUG("[AllReduceOpbasePipeline][RunReduceScatterInterServer] local rank[%u], localOffset[%llu]," \
150 : "tx with slice[%llu]", rankId_, sliceMemOffset, curSize_);
151 0 : u32 rxSliceId = ((interRankId_ + 2 + step) % interRankSize_) * intraRankSize_ + intraRankId_;
152 0 : u64 rxSliceOffset = memSliceSize_ * rxSliceId;
153 0 : u64 rxOffset = (rxSliceOffset) % HCCL_MIN_SLICE_ALIGN_910B;
154 0 : void* rxLocalAddr = static_cast<u8 *>(dmaMem_[rxDMAMemSliceId].ptr()) + rxOffset;
155 0 : u64 rxDataSize = memSliceSize_;
156 0 : if (rxSliceId == (interRankSize_ * intraRankSize_ - 1)) {
157 0 : rxDataSize = lastSliceSize_;
158 : }
159 0 : DeviceMem rxLocalMem = DeviceMem::create(rxLocalAddr, rxDataSize);
160 0 : DstMemType resultMem = DstMemType::RESULT_INPUT_MEM;
161 0 : CHK_RET(reducerInfo_->run(dispatcher_, prevInterLink, rxOffset, rxLocalMem, rxLocalMem, rxLocalMem,
162 : stream_, resultMem, srcMemType));
163 0 : return HCCL_SUCCESS;
164 0 : }
165 :
166 0 : HcclResult AllReduceOpbasePipeline::RunAllGatherInterServer(u32 step,
167 : const LINK &prevInterLink,
168 : const LINK &nextInterLink)
169 : {
170 0 : CHK_RET(prevInterLink->TxAck(stream_));
171 0 : CHK_RET(nextInterLink->RxAck(stream_));
172 0 : u32 dmaMemSliceNum = dmaMem_.size();
173 0 : u32 rxDMAMemSliceId = (interRankSize_ + step) % dmaMemSliceNum;
174 0 : u32 txDMAMemSliceId = (interRankSize_ + step - 1) % dmaMemSliceNum;
175 0 : UserMemType srcMemType = txDMAMemSliceId == 1? UserMemType::OUTPUT_MEM: UserMemType::INPUT_MEM;
176 0 : UserMemType dstMemType = rxDMAMemSliceId == 1? UserMemType::OUTPUT_MEM: UserMemType::INPUT_MEM;
177 0 : u32 txSliceId = ((interRankId_ + step) % interRankSize_) * intraRankSize_ + intraRankId_;
178 0 : u64 sliceMemOffset = memSliceSize_ * txSliceId;
179 0 : u64 offset = sliceMemOffset % HCCL_MIN_SLICE_ALIGN_910B;
180 0 : void* txLocalAddr = static_cast<u8 *>(dmaMem_[txDMAMemSliceId].ptr()) + offset;
181 0 : u64 txDataSize = memSliceSize_;
182 0 : if (txSliceId == (interRankSize_ * intraRankSize_ - 1)) {
183 0 : txDataSize = lastSliceSize_;
184 : }
185 0 : DeviceMem srcMem = DeviceMem::create(txLocalAddr, txDataSize);
186 0 : CHK_RET(nextInterLink->TxAsync(dstMemType, offset, static_cast<u8 *>(dmaMem_[txDMAMemSliceId].ptr()) + offset,
187 : txDataSize, stream_));
188 :
189 0 : u32 rxSliceId = ((interRankId_ + step + 1) % interRankSize_) * intraRankSize_ + intraRankId_;
190 0 : u64 rxSliceOffset = memSliceSize_ * rxSliceId;
191 0 : u64 rxOffset = rxSliceOffset % HCCL_MIN_SLICE_ALIGN_910B;
192 0 : void* rxLocalAddr = static_cast<u8 *>(dmaMem_[rxDMAMemSliceId].ptr()) + rxOffset;
193 0 : u64 rxDataSize = memSliceSize_;
194 0 : if (rxSliceId == (interRankSize_ * intraRankSize_ - 1)) {
195 0 : rxDataSize = lastSliceSize_;
196 : }
197 0 : DeviceMem rxLocalMem = DeviceMem::create(rxLocalAddr, rxDataSize);
198 0 : CHK_RET(prevInterLink->RxAsync(srcMemType, rxOffset, static_cast<u8 *>(dmaMem_[rxDMAMemSliceId].ptr()) + rxOffset,
199 : rxDataSize, stream_)); // wait
200 0 : return HCCL_SUCCESS;
201 0 : }
202 :
203 0 : HcclResult AllReduceOpbasePipeline::CopyToScratchBuffer(u32 step)
204 : {
205 0 : u32 dmaMemSliceNum = dmaMem_.size();
206 0 : u32 dmaMemSliceId = step % dmaMemSliceNum;
207 0 : u32 sliceId = ((interRankId_ + 1 + step) % interRankSize_) * intraRankSize_ + intraRankId_;
208 0 : u64 sliceMemOffset = memSliceSize_ * sliceId;
209 0 : u64 offset = sliceMemOffset % HCCL_MIN_SLICE_ALIGN_910B;
210 : // 把一块切片从userIn 做拷贝到CCLBuffer
211 0 : void* srcAddr = static_cast<u8 *>(usrInMem_) + sliceMemOffset;
212 0 : u64 dataSize = memSliceSize_;
213 0 : if (sliceId == (interRankSize_ * intraRankSize_ - 1)) {
214 0 : dataSize = lastSliceSize_;
215 : }
216 0 : DeviceMem locSrc = DeviceMem::create(srcAddr, dataSize);
217 0 : DeviceMem locDst = DeviceMem::create(static_cast<u8 *>(dmaMem_[dmaMemSliceId].ptr()) + offset, dataSize);
218 0 : CHK_RET(HcclD2DMemcpyAsync(dispatcher_, locDst, locSrc, stream_));
219 0 : return HCCL_SUCCESS;
220 0 : }
221 :
222 0 : HcclResult AllReduceOpbasePipeline::RunAsync()
223 : {
224 : // inter ring algo
225 0 : u32 prevInterRankId = (interRankId_ + 1) % interRankSize_;
226 0 : u32 nextInterRankId = (interRankId_ - 1 + interRankSize_) % interRankSize_;
227 0 : LINK prevInterLink = interLinks_[prevInterRankId];
228 0 : LINK nextInterLink = interLinks_[nextInterRankId];
229 : // 当前使用2块DMAMem buffer
230 0 : u32 dmaMemSliceNum = dmaMem_.size();
231 0 : for (u32 step = 0; step < interRankSize_; step ++) {
232 0 : if (step == 0) {
233 : // 把第一块切片从userIn 做拷贝到CCLBuffer
234 0 : CHK_RET(CopyToScratchBuffer(step));
235 0 : CHK_RET(MainRecordSub());
236 0 : CHK_RET(SubWaitMain());
237 : }
238 : // server内做SDMA的reduce
239 0 : CHK_RET(RunReduceScatterIntraServer(step));
240 0 : CHK_RET(SubRecordMain());
241 0 : CHK_RET(MainWaitSub());
242 0 : if (step < interRankSize_ - 1) {
243 : // 把下一块切片从userIn 做拷贝到CCLBuffer
244 0 : CHK_RET(CopyToScratchBuffer(step + 1));
245 0 : CHK_RET(MainRecordSub());
246 0 : CHK_RET(SubWaitMain());
247 : // server间做RDMA的reduce，可与下一个step的SDMA并发执行
248 0 : CHK_RET(RunReduceScatterInterServer(step, prevInterLink, nextInterLink));
249 : // 确保step[n+2]的SDMA之前step[n]的RDMA已经完成，防止内存踩踏
250 0 : CHK_RET(prevInterLink->PostFinAck(stream_));
251 0 : CHK_RET(nextInterLink->WaitFinAck(stream_));
252 : }
253 : }
254 0 : DeviceMem srcZero = DeviceMem::create(usrInMem_, 0);
255 0 : DeviceMem dstZero = DeviceMem::create(usrOutMem_, 0);
256 0 : CHK_RET(HcclD2DMemcpyAsync(dispatcher_, dstZero, srcZero, stream_));
257 :
258 0 : for (u32 step = 0; step < interRankSize_; step ++) {
259 0 : CHK_RET(MainRecordSub());
260 0 : CHK_RET(SubWaitMain());
261 0 : if (step < interRankSize_ - 1) {
262 0 : CHK_RET(RunAllGatherInterServer(step, prevInterLink, nextInterLink));
263 0 : CHK_RET(prevInterLink->PostFinAck(stream_));
264 0 : CHK_RET(nextInterLink->WaitFinAck(stream_));
265 : // inter的最后一步需要barrier确保数据发完
266 0 : if (step == interRankSize_ - STEP_OFFSET_TWO) {
267 0 : CHK_RET(ExecuteBarrier(prevInterLink, nextInterLink));
268 : }
269 : }
270 0 : CHK_RET(RunAllGatherIntraServer(step));
271 0 : CHK_RET(SubRecordMain());
272 0 : CHK_RET(MainWaitSub());
273 0 : u32 DMAMemSliceId = (interRankSize_ + step - 1) % dmaMemSliceNum;
274 0 : u32 sliceId = ((interRankId_ + step) % interRankSize_) * intraRankSize_ + intraRankId_;
275 0 : u64 sliceMemOffset = memSliceSize_ * sliceId;
276 0 : u64 offset = sliceMemOffset % HCCL_MIN_SLICE_ALIGN_910B;
277 0 : void* txLocalAddr = static_cast<u8 *>(dmaMem_[DMAMemSliceId].ptr()) + offset;
278 0 : u64 dataSize = memSliceSize_;
279 0 : if (sliceId == (interRankSize_ * intraRankSize_ - 1)) {
280 0 : dataSize = lastSliceSize_;
281 : }
282 0 : DeviceMem srcMem = DeviceMem::create(txLocalAddr, dataSize);
283 0 : DeviceMem dstMem = DeviceMem::create(static_cast<u8 *> (usrOutMem_) + sliceMemOffset, dataSize);
284 0 : CHK_RET(HcclD2DMemcpyAsync(dispatcher_, dstMem, srcMem, stream_));
285 0 : HCCL_INFO("[AllReducePipeline][RunAsync]AllReducePipeline finished groupRankId[%u] ", rankId_);
286 0 : }
287 0 : return HCCL_SUCCESS;
288 0 : }
289 :
290 0 : HcclResult AllReduceOpbasePipeline::Prepare(const HcomCollOpInfo *opInfo, DeviceMem &cclBufferA, DeviceMem &cclBufferB,
291 : const u64 count, const SubCommInfo &level1CommInfo, const SubCommInfo &level0CommInfo,
292 : Stream &mainStream, std::vector<Stream> &subStream,
293 : std::vector<std::shared_ptr<LocalNotify>> ¬ifyMain, std::vector<std::shared_ptr<LocalNotify>> ¬ifySub)
294 : {
295 0 : unitSize_ = SIZE_TABLE[opInfo->dataType];
296 0 : sliceCount_ = count / (level0CommInfo.localRankSize * level1CommInfo.localRankSize);
297 0 : memSliceSize_ = sliceCount_ * unitSize_;
298 0 : lastSliceCount_ = count - sliceCount_ * (level0CommInfo.localRankSize * level1CommInfo.localRankSize - 1);
299 0 : lastSliceSize_ = lastSliceCount_ * unitSize_;
300 :
301 0 : usrInMem_ = opInfo->inputAddr;
302 0 : usrOutMem_ = opInfo->outputAddr;
303 0 : reductionOp_ = opInfo->reduceOp;
304 0 : dataType_ = opInfo->dataType;
305 :
306 : // needed resource
307 : // stream: 1 * mainStream + (n -1) * subStream
308 : // interNotify, streamNotify
309 :
310 : // stream
311 : // mainStream负责locMemCpy、inter执行以及subStream同步控制
312 0 : stream_ = mainStream;
313 : // subStream负责:
314 : // streamId[0:intraRankSize-1]: intraRankSize-1个intra执行
315 0 : subStreams_ = subStream;
316 :
317 0 : intraRankSize_ = level0CommInfo.localRankSize;
318 0 : interRankSize_ = level1CommInfo.localRankSize;
319 0 : intraRankId_ = level0CommInfo.localRank;
320 0 : interRankId_ = level1CommInfo.localRank;
321 0 : rankId_ = intraRankId_ + interRankId_ * intraRankSize_;
322 :
323 : // streamNotify, size: n
324 0 : streamNotifyMain_ = notifyMain;
325 0 : if (streamNotifyMain_.size() < intraRankSize_) {
326 0 : HCCL_ERROR("[AllReduceOpbasePipeline][Prepare]rank[%u] streamNotifyMain_ size [%u] error, is smaller than," \
327 : "intraRankSize_[%u]", rankId_, streamNotifyMain_.size(), intraRankSize_);
328 0 : return HCCL_E_INTERNAL;
329 : }
330 0 : streamNotifySub_ = notifySub;
331 0 : if (streamNotifySub_.size() < intraRankSize_) {
332 0 : HCCL_ERROR("[AllReduceOpbasePipeline][Prepare]rank[%u] streamNotifySub_ size [%u] error, is smaller than," \
333 : "intraRankSize_[%u]", rankId_, streamNotifySub_.size(), intraRankSize_);
334 0 : return HCCL_E_INTERNAL;
335 : }
336 :
337 0 : intraLinks_ = level0CommInfo.links;
338 0 : interLinks_ = level1CommInfo.links;
339 :
340 0 : count_ = count;
341 : // 2级流水,使用2块DMAMem
342 0 : dmaMem_.push_back(cclBufferA);
343 0 : dmaMem_.push_back(cclBufferB);
344 :
345 0 : HCCL_INFO("[AllReduceOpbasePipeline][Prepare]streamNum[%u], streamNotifyMainNum[%u], streamNotifySubNum[%u]",
346 : subStreams_.size(), streamNotifyMain_.size(), streamNotifySub_.size());
347 0 : HCCL_INFO("[AllReduceOpbasePipeline][Prepare]interLinksNum[%u], intraLinksNum[%u]",
348 : interLinks_.size(), intraLinks_.size());
349 0 : senderInfo_.reset(new (std::nothrow) Sender(dataType_, reductionOp_, reduceAttr_));
350 0 : CHK_SMART_PTR_NULL(senderInfo_);
351 0 : reducerInfo_.reset(new (std::nothrow) Reducer(dataType_, reductionOp_, reduceAttr_));
352 0 : CHK_SMART_PTR_NULL(reducerInfo_);
353 0 : return HCCL_SUCCESS;
354 : }
355 :
356 0 : HcclResult AllReduceOpbasePipeline::GetNslbAdjInfo(const u32 rank, const u32 rankSize,
357 : const std::vector<LINK> &links, AdjInfo& nslbAdjInfo)
358 : {
359 0 : u32 ringNextRank = (rank + 1) % rankSize;
360 0 : LINK nslbNext = links[ringNextRank];
361 0 : CHK_SMART_PTR_NULL(nslbNext);
362 :
363 : // Pipeline 步长合并 等同于 ring
364 0 : NslbDpAdjInfo adjInfoStep = {0};
365 0 : adjInfoStep.dstLocalRankId = nslbNext->GetRemoteRank();
366 0 : adjInfoStep.phaseId = 1;
367 0 : adjInfoStep.rev = 0;
368 0 : nslbAdjInfo.nsAdjInfo.push_back(adjInfoStep);
369 :
370 : // Pipeline 步长合并 等同于 ring
371 0 : NslbDpAdjInfo nextInfoStep = {0};
372 0 : nextInfoStep.dstLocalRankId = nslbNext->GetRemoteRank();
373 0 : nextInfoStep.phaseId = nslbAdjInfo.nsAdjInfo[0].phaseId + 1;
374 0 : nextInfoStep.rev = 0;
375 0 : nslbAdjInfo.nsAdjInfo.push_back(nextInfoStep);
376 :
377 0 : nslbAdjInfo.dstRankNum = nslbAdjInfo.nsAdjInfo.size();
378 0 : return HCCL_SUCCESS;
379 0 : }
380 :
381 : REGISTER_TEMPLATE(TemplateType::TEMPLATE_ALL_REDUCE_OPBASE_PIPELINE, AllReduceOpbasePipeline);
382 : } // namespace hccl
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