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1 : /**
2 : * Copyright (c) 2025 Huawei Technologies Co., Ltd.
3 : * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
4 : * CANN Open Software License Agreement Version 2.0 (the "License").
5 : * Please refer to the License for details. You may not use this file except in compliance with the License.
6 : * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
7 : * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
8 : * See LICENSE in the root of the software repository for the full text of the License.
9 : */
10 :
11 : #ifndef HCCLV2_CCU_INSTRUCTION_REDUCE_NHR_1D_H_
12 : #define HCCLV2_CCU_INSTRUCTION_REDUCE_NHR_1D_H_
13 :
14 : #include "template_utils.h"
15 : #include "instruction.h"
16 : #include "ins_queue.h"
17 : #include "ccu_context_utils.h"
18 : #include "ccu_ctx_signature.h"
19 : #include "ccu_ins.h"
20 : #include "ccu_rank_group.h"
21 : #include "ccu_instruction_all_reduce_nhr1d_mem2mem.h"
22 :
23 : namespace Hccl {
24 :
25 : using NHRStepInfo = struct NHRStepInfoDef;
26 :
27 : // 为ReduceNHR1D实现的CCUIns、CCUCtxArg与CCUTaskArg
28 : class CcuCtxArgReduceNHR1D : public CcuCtxArg {
29 : public:
30 0 : explicit CcuCtxArgReduceNHR1D(const std::vector<uint64_t> &dimSize, uint32_t rankId, uint32_t rootId, uint32_t axisId,
31 : uint32_t axisSize, const std::vector<NHRStepInfo> stepInfoVector,
32 : const std::map<u32, u32> indexMap, const CollAlgOperator &op,
33 : const std::vector<std::vector<RankId>> &tempVTopo)
34 0 : : dimSize_(dimSize), rankId_(rankId), rootId_(rootId), axisId_(axisId), axisSize_(axisSize), stepInfoVector_(stepInfoVector),
35 0 : indexMap_(indexMap), op_(op), tempVTopo_(tempVTopo)
36 : {
37 0 : }
38 0 : CcuCtxSignature GetCtxSignature() const override
39 : {
40 0 : CcuCtxSignature signature;
41 0 : GenerateCcuCtxSignature(signature, CcuInstType::CCU_REDUCE_NHR_1D_MEM2MEM, op_, tempVTopo_);
42 0 : return signature;
43 0 : }
44 : std::vector<uint64_t> dimSize_;
45 : uint32_t rankId_;
46 : uint32_t rootId_;
47 : uint32_t axisId_;
48 : uint32_t axisSize_;
49 : std::vector<NHRStepInfo> stepInfoVector_;
50 : std::map<u32, u32> indexMap_;
51 : CollAlgOperator op_;
52 : std::vector<std::vector<RankId>> tempVTopo_;
53 : };
54 :
55 : class CcuTaskArgReduceNHR1D : public CcuTaskArg {
56 : public:
57 0 : explicit CcuTaskArgReduceNHR1D(uint64_t inputAddr, uint64_t outputAddr, uint64_t token,
58 : uint64_t isInputOutputEqual, uint64_t die0Size, uint64_t die1Size,
59 : uint64_t die0SliceSize, uint64_t die1SliceSize,
60 : uint64_t die0LastSliceSize, uint64_t die1LastSliceSize)
61 0 : : inputAddr_(inputAddr), outputAddr_(outputAddr), token_(token), isInputOutputEqual_(isInputOutputEqual),
62 0 : die0Size_(die0Size), die1Size_(die1Size), die0SliceSize_(die0SliceSize), die1SliceSize_(die1SliceSize),
63 0 : die0LastSliceSize_(die0LastSliceSize), die1LastSliceSize_(die1LastSliceSize)
64 : {
65 0 : }
66 :
67 : uint64_t inputAddr_;
68 : uint64_t outputAddr_;
69 : uint64_t token_;
70 : uint64_t isInputOutputEqual_;
71 : uint64_t die0Size_;
72 : uint64_t die1Size_;
73 : uint64_t die0SliceSize_;
74 : uint64_t die1SliceSize_;
75 : uint64_t die0LastSliceSize_;
76 : uint64_t die1LastSliceSize_;
77 : };
78 :
79 : class CcuInstructionReduceNHR1D : public CcuInstruction {
80 : public:
81 0 : CcuInstructionReduceNHR1D() : CcuInstruction()
82 : {
83 0 : }
84 :
85 0 : void Init(uint32_t rankId, uint32_t rootId, uint64_t inputAddr, uint64_t outputAddr, uint32_t axisId, uint32_t axisSize,
86 : uint64_t die0Size, uint64_t die1Size, uint64_t die0SliceSize, uint64_t die1SliceSize,
87 : uint64_t die0LastSliceSize, uint64_t die1LastSliceSize, std::vector<NHRStepInfo> stepInfoVector,
88 : std::map<u32, u32> indexMap, uint64_t token, uint64_t isInputOutputEqual, CollAlgOperator &op,
89 : std::vector<std::vector<RankId>> &tempVTopo)
90 : {
91 0 : u32 maxDimNum = 1;
92 0 : if (tempVTopo.size() != maxDimNum) {
93 0 : THROW<InvalidParamsException>(StringFormat(
94 : "[CcuInstructionReduceNHR1D] tempVTopo size is not 1, size is [%zu].", tempVTopo.size()));
95 : }
96 0 : dimSize_.push_back(tempVTopo[0].size());
97 0 : rankId_ = rankId;
98 0 : rootId_ = rootId;
99 0 : inputAddr_ = inputAddr;
100 0 : outputAddr_ = outputAddr;
101 0 : axisId_ = axisId;
102 0 : axisSize_ = axisSize;
103 0 : die0Size_ = die0Size;
104 0 : die1Size_ = die1Size;
105 0 : die0SliceSize_ = die0SliceSize;
106 0 : die1SliceSize_ = die1SliceSize;
107 0 : die0LastSliceSize_ = die0LastSliceSize;
108 0 : die1LastSliceSize_ = die1LastSliceSize;
109 0 : stepInfoVector_ = stepInfoVector;
110 0 : indexMap_ = indexMap;
111 0 : token_ = token;
112 0 : isInputOutputEqual_ = isInputOutputEqual;
113 0 : op_ = op;
114 0 : tempVTopo_ = tempVTopo;
115 0 : return;
116 : }
117 :
118 0 : CcuInstType GetInstType() const override
119 : {
120 0 : HCCL_INFO("CcuInstructionReduceNHR1D instype is CCU_REDUCE_NHR_1D_MEM2MEM.");
121 0 : return instType_;
122 : }
123 :
124 0 : std::string Describe() const override
125 : {
126 0 : return StringFormat("CcuInstructionReduceNHR1D rankId [%u], instType[%s]", rankId_,
127 0 : instType_.Describe().c_str());
128 : }
129 :
130 : void SetInstType(CcuInstType instType)
131 : {
132 : instType_ = instType;
133 : }
134 :
135 0 : std::unique_ptr<CcuCtxArg> GetCtxArg() const override
136 : {
137 0 : return std::make_unique<CcuCtxArgReduceNHR1D>(dimSize_, rankId_, rootId_, axisId_, axisSize_, stepInfoVector_,
138 0 : indexMap_, op_, tempVTopo_);
139 : }
140 :
141 0 : std::unique_ptr<CcuTaskArg> GetTaskArg() const override
142 : {
143 0 : return std::make_unique<CcuTaskArgReduceNHR1D>(inputAddr_, outputAddr_, token_, isInputOutputEqual_,
144 0 : die0Size_, die1Size_, die0SliceSize_, die1SliceSize_,
145 0 : die0LastSliceSize_, die1LastSliceSize_);
146 : }
147 :
148 : private:
149 : CcuInstType instType_ = CcuInstType::CCU_REDUCE_NHR_1D_MEM2MEM;
150 : std::vector<uint64_t> dimSize_;
151 : uint32_t rankId_{0};
152 : uint32_t rootId_{0};
153 : uint32_t axisId_{0};
154 : uint32_t axisSize_{0};
155 : uint64_t inputAddr_{0};
156 : uint64_t outputAddr_{0};
157 : uint64_t die0Size_{0};
158 : uint64_t die1Size_{0};
159 : uint64_t die0SliceSize_{0};
160 : uint64_t die1SliceSize_{0};
161 : uint64_t die0LastSliceSize_{0};
162 : uint64_t die1LastSliceSize_{0};
163 : uint64_t isInputOutputEqual_{0};
164 : CollAlgOperator op_;
165 : std::vector<NHRStepInfo> stepInfoVector_;
166 : std::map<u32, u32> indexMap_;
167 : uint64_t token_{0};
168 : std::vector<std::vector<RankId>> tempVTopo_;
169 : };
170 : } // namespace Hccl
171 :
172 : #endif // HCCLV2_CCU_INSTRUCTION_ALL_REDUCE_NHR_1D_H_
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