LCOV - code coverage report
Current view: top level - src/api_check - kernel_vec_compare_register_check.cpp (source / functions) Coverage Total Hit
Test: coverage.info_filtered Lines: 0.0 % 28 0
Test Date: 2026-07-27 14:41:20 Functions: 0.0 % 2 0

            Line data    Source code
       1              : /**
       2              :  * Copyright (c) 2025 Huawei Technologies Co., Ltd.
       3              :  * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
       4              :  * CANN Open Software License Agreement Version 2.0 (the "License").
       5              :  * Please refer to the License for details. You may not use this file except in compliance with the License.
       6              :  * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
       7              :  * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
       8              :  * See LICENSE in the root of the software repository for the full text of the License.
       9              :  */
      10              : 
      11              : /*!
      12              :  * \file kernel_vec_compare_register_check.cpp
      13              :  * \brief
      14              :  */
      15              : 
      16              : #include "kernel_check_params.h"
      17              : #include "kernel_vec_compare_register_check.h"
      18              : 
      19              : namespace AscendC {
      20              : namespace check {
      21            0 : bool TikcppVecCmpRgtCheck::CheckAllLowLevel(std::vector<uint64_t> maskArray)
      22              : {
      23            0 :     const std::string supportPos = "VECIN/VECOUT/VECCALC";
      24            0 :     ASCENDC_CHECK(CheckTensorScope(param_.src0LogicPos, static_cast<uint8_t>(HardWareIndex::UB), "src0", supportPos));
      25            0 :     ASCENDC_CHECK(CheckTensorScope(param_.src1LogicPos, static_cast<uint8_t>(HardWareIndex::UB), "src1", supportPos));
      26              : 
      27            0 :     ASCENDC_CHECK(CheckBufferSizeOverFlow(
      28              :         param_.src0Size, GlobalParams::Instance().bufferSizeMap.at(param_.src0Pos),
      29              :         "check src0 tensor buffersize failed"));
      30            0 :     ASCENDC_CHECK(CheckBufferSizeOverFlow(
      31              :         param_.src1Size, GlobalParams::Instance().bufferSizeMap.at(param_.src1Pos),
      32              :         "check src1 tensor buffersize failed"));
      33            0 :     ASCENDC_CHECK(CheckAddrAlign());
      34              : 
      35              :     TensorOverflowParams params = {
      36            0 :         param_.src0Size,
      37            0 :         param_.src0DtypeBytes,
      38            0 :         static_cast<uint64_t>(param_.repeatTimes),
      39            0 :         static_cast<uint64_t>(param_.src0BlockStride),
      40            0 :         static_cast<uint64_t>(param_.src0RepeatStride),
      41            0 :         false};
      42            0 :     ASCENDC_CHECK(CheckTensorOverflowLow(maskArray, params, "src0Local"));
      43            0 :     params = {
      44            0 :         param_.src1Size,
      45            0 :         param_.src1DtypeBytes,
      46            0 :         static_cast<uint64_t>(param_.repeatTimes),
      47            0 :         static_cast<uint64_t>(param_.src1BlockStride),
      48            0 :         static_cast<uint64_t>(param_.src1RepeatStride),
      49            0 :         false};
      50            0 :     ASCENDC_CHECK(CheckTensorOverflowLow(maskArray, params, "src1Local"));
      51              : 
      52            0 :     return true;
      53            0 : }
      54              : 
      55            0 : bool TikcppVecCmpRgtCheck::CheckAddrAlign()
      56              : {
      57            0 :     bool src0Res = CheckTensorAddrAlign(param_.src0Addr, param_.src0Pos, ONE_BLK_SIZE, "src0");
      58            0 :     bool src1Res = CheckTensorAddrAlign(param_.src1Addr, param_.src1Pos, ONE_BLK_SIZE, "src1");
      59            0 :     return src0Res && src1Res;
      60              : }
      61              : } // namespace check
      62              : } // namespace AscendC
        

Generated by: LCOV version 2.0-1